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Running the attached test case with "verilator_bin --cc 2.v" produces:
%Error: 2.v:1: syntax error, unexpected IDENTIFIER
le[=11111111111'k[=11111111111'd
^~
%Error: 2.v:1: Too many digits for 32 bit number: 11111111111
... As that number was unsized ('d...) it is limited to 32 bits (IEEE 2017 5.7.1)
... Suggest adding a size to it.
le[=11111111111'k[=11111111111'd
^~~~~~~~~~~
terminate called after throwing an instance of 'std::length_error'
what(): vector::_M_default_append
Aborted
This on version:
Verilator 4.019 devel rev v4.018-33-gcb115e1a
The problem is also seen on:
Verilator 3.916 2017-11-25 rev verilator_3_914-65-g0478dbd
The text was updated successfully, but these errors were encountered:
Author Name: Eric Rippey
Original Redmine Issue: 1530 from https://www.veripool.org
Original Assignee: Wilson Snyder (@wsnyder)
Running the attached test case with "verilator_bin --cc 2.v" produces:
This on version:
Verilator 4.019 devel rev v4.018-33-gcb115e1a
The problem is also seen on:
Verilator 3.916 2017-11-25 rev verilator_3_914-65-g0478dbd
The text was updated successfully, but these errors were encountered: