Author Name: Eric Rippey
Original Redmine Issue: 1559 from https://www.veripool.org

Running:

verilator_bin --lint-only

with test existing testcase at "test_regress/t/t_order_loop_bad.v", which is a regression test for this ancient bug:

https://www.veripool.org/issues/513

Produces:

%Error: Circular logic when ordering code (non-cutable edge loop)
verilator-veripool/test_regress/t/t_order_loop_bad.v:24: Example path: ACTIVE
verilator-veripool/test_regress/t/t_order_loop_bad.v:31: Example path: ALWAYS
verilator-veripool/test_regress/t/t_order_loop_bad.v:18: Example path: t.ready
verilator-veripool/test_regress/t/t_order_loop_bad.v:24: Example path: ACTIVE
verilator-veripool/test_regress/t/t_order_loop_bad.v:18: Example path: t.ready
verilator-veripool/test_regress/t/t_order_loop_bad.v:24: Example path: ACTIVE
verilator-veripool/test_regress/t/t_order_loop_bad.v:31: Example path: ALWAYS
verilator-veripool/test_regress/t/t_order_loop_bad.v:18: Example path: t.ready
%Error: Internal Error: verilator-veripool/test_regress/t/t_order_loop_bad.v:18: ../V3Graph.cpp:275: Loops detected in graph: VERTEX=0x299b770\n TOP->t__DOT__ready r5 c5
reg ready;
^~~~~

So it diagnoses that there is a loop, which the test harness look for. But then it goes on to produce the internal error message.

I would assume that it's intended that when there's a construct that Verilator's design can't support it should just be an error given to the user and all paths that lead to "Internal Error" are meant to be unreachable. But I don't know this for sure.