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$value_plusargs compile error for [1..16]-bit signals #1592
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Original Redmine Comment Great, love getting bugs with fixes included! Two minor things to add to your patch so I can merge it and make sure it stays fixed. First, please add your name to docs/CONTRIBUTORS, see docs/CONTRIBUTING.adoc for more info. 2. Please update one of the tests, e.g. t_sys_plusargs.v to show the problem. Thanks again. |
Original Redmine Comment Would you be willing to make the changes suggested earlier (test & add your name to contributors) so this can get in the next release? Thanks. |
Original Redmine Comment Sorry for the delay. I was waiting to hear back from my company's legal department regarding open source contributions. I'll submit the requested changes shortly. |
Original Redmine Comment Pull request: #6 |
Original Redmine Comment Fixed in git towards eventual 4.024 release. |
Original Redmine Comment In 4.024. |
Author Name: Garrett Smith
Original Redmine Issue: 1592 from https://www.veripool.org
Original Assignee: Garrett Smith
Passing signals of length <= 16 bits to $value$plusargs results in compiler errors due to missing overloads for CData and SData. The variable of type vluint8_t or vluint16_t will not bind to a vluint32_t reference:
This was resolved by overloading VL_VALUEPLUSARGS_INI for CData and SData:
gcsmith@b1ad0b2
The text was updated successfully, but these errors were encountered: