[lint] Width Warning due to Comparison of String Parameter in Generate Statement #1621
Labels
area: lint
Issue involves SystemVerilog lint checking
resolution: no fix needed
Closed; no fix required (not a bug)
Author Name: Michael Schaffner
Original Redmine Issue: 1621 from https://www.veripool.org
I recently ran
verilator --lint-only
on a module that has a string parameter which is used in a generate block later on in the body of the module.Lint throws a
%Warning-WIDTH
warning due to a width mismatch between LHS and RHS of the EQ operator used in that generate statement, and I would like to ask whether this is the intended behavior of lint in this case.I feel like this is the normal way a string parameter is typically used in a design, and was a bit surprised to see this trigger lint warnings.
This issue can be reproduced by downloading
prim_lfsr.sv
andprim_assert.sv
fromhttps://github.com/lowRISC/opentitan/blob/8711e21c902bed11b09f156579145c247cf88b49/hw/ip/prim/rtl/prim_lfsr.sv
https://github.com/lowRISC/opentitan/blob/8711e21c902bed11b09f156579145c247cf88b49/hw/ip/prim/rtl/prim_assert.sv
and running
verilator --lint-only prim_assert.sv prim_lfsr.sv
using Verilator 4.020 2019-10-06 rev v4.018-62-gdfcd412e.
The warning I am referencing above is the third one that appears:
The text was updated successfully, but these errors were encountered: