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Signal declarations in for loops don't work everywhere #205

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veripoolbot opened this issue Jan 19, 2010 · 2 comments
Closed

Signal declarations in for loops don't work everywhere #205

veripoolbot opened this issue Jan 19, 2010 · 2 comments
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area: parser Issue involves SystemVerilog parsing resolution: fixed Closed; fixed

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Author Name: Byron Bradley (@bbradley)
Original Redmine Issue: 205 from https://www.veripool.org
Original Date: 2010-01-19
Original Assignee: Byron Bradley (@bbradley)


If a signal is declared in a for loop after something that called VARRESET(), it will attempt to create a signal with UNKNOWN type. I think the solution here is to just put a varRESET in the initialization of the for loop. Patch attached.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-01-20T00:33:39Z


Applied to git, thanks for the patch!

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-02-07T12:42:15Z


In 3.800.

@veripoolbot veripoolbot added area: parser Issue involves SystemVerilog parsing resolution: fixed Closed; fixed labels Dec 22, 2019
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Labels
area: parser Issue involves SystemVerilog parsing resolution: fixed Closed; fixed
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