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Bitwise reductions on signals with >1 packed dimension generates incorrect code #227

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veripoolbot opened this issue Mar 23, 2010 · 5 comments
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area: wrong runtime result Issue involves an incorrect runtine result from Verilated model resolution: fixed Closed; fixed

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Author Name: Byron Bradley (@bbradley)
Original Redmine Issue: 227 from https://www.veripool.org
Original Date: 2010-03-23
Original Assignee: Byron Bradley (@bbradley)


Code such as:

    logic [3:0][7:0][1:0] vld;
    assign vld_or = |vld;

gets treated as a normal slice and generates incorrect code. I have this working and will submit patches tomorrow, just need to do some more verification. The changes are mostly to V3Slice with some small changes elsewhere to differentiate between packed and unpacked dimensions.

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Original Redmine Comment
Author Name: Byron Bradley (@bbradley)
Original Date: 2010-03-24T22:32:25Z


Three patches attached:

  • Add isPacked() to AstArrayDType().
  • Modify AstVar::dimensions to return a pair of packed/unpacked dimensions.
  • Support the reduction operators (or, and, xor, xnor) in V3Slice. This includes a bug-fix to the ordering of dimensions to insertImplicit().

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-04-10T01:09:11Z


Sorry, must have been asleep when I saw the mail about this.

Applied for 3.802+. Only changes were to add a Changes line, and a couple of gcc lint warnings.

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Original Redmine Comment
Author Name: Byron Bradley (@bbradley)
Original Date: 2010-04-22T11:55:14Z


Sorry Wilson, this change caused a regression where you have non-reduction unary operators working on multiple dimensions such as:

    logic [3:0][7:0][1:0] not_lhs;
    logic [3:0][7:0][1:0] not_rhs;
    assign not_lhs = ~not_rhs;

Fix and test-case attached.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-04-22T13:41:04Z


Applied, thanks.

If we start needing to do more things on AstRed* it's better to make them each a subclass of a new AstNodeRed or somesuch, which in turn is a AstNodeUniop. It's not worth it for this one use though.

BTW sorry I botched your name, I'm trying (and obviously failing to) train myself to always cut-and-paste names rather than type...

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-08-09T02:06:55Z


This was resolved back in 3.802.

@veripoolbot veripoolbot added area: wrong runtime result Issue involves an incorrect runtine result from Verilated model resolution: fixed Closed; fixed labels Dec 22, 2019
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Labels
area: wrong runtime result Issue involves an incorrect runtine result from Verilated model resolution: fixed Closed; fixed
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