Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Problem with clocks after commit e57d0047184 #265

Closed
veripoolbot opened this issue Jun 14, 2010 · 3 comments
Closed

Problem with clocks after commit e57d0047184 #265

veripoolbot opened this issue Jun 14, 2010 · 3 comments
Assignees
Labels
area: wrong runtime result Issue involves an incorrect runtine result from Verilated model resolution: fixed Closed; fixed

Comments

@veripoolbot
Copy link
Contributor


Author Name: Byron Bradley (@bbradley)
Original Redmine Issue: 265 from https://www.veripool.org
Original Date: 2010-06-14
Original Assignee: Wilson Snyder (@wsnyder)


Commit e57d004 has caused one of our blocks to start failing all of the tests, reverting this commit makes them pass again. The problem seems to be related to clocks with multiple bits, i.e. our the top module contains:

input   logic [1:0] clk

and only one bit is being passed into a module:

someModule #(1) SOME_MODULE (.clk(clk[0]), ...)

@veripoolbot
Copy link
Contributor Author


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-06-22T00:41:57Z


I added the t/t_clk_2in_vec.pl to look for this bug, but it didn't turn up. Can you give more details of what the primary input looks like and what loads are on the bussed clock?

@veripoolbot
Copy link
Contributor Author


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-07-12T14:34:29Z


BTW this is still waiting on a testcase.

@veripoolbot
Copy link
Contributor Author


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-12-08T01:42:15Z


Please reopen with a test case if still failing, thanks.

@veripoolbot veripoolbot added area: wrong runtime result Issue involves an incorrect runtine result from Verilated model resolution: fixed Closed; fixed labels Dec 22, 2019
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
area: wrong runtime result Issue involves an incorrect runtine result from Verilated model resolution: fixed Closed; fixed
Projects
None yet
Development

No branches or pull requests

2 participants