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Support of VHDL93 #380

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veripoolbot opened this issue Aug 10, 2011 · 1 comment
Closed

Support of VHDL93 #380

veripoolbot opened this issue Aug 10, 2011 · 1 comment
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effort: weeks Expect this issue to require weeks or more of invested effort to resolve resolution: abandoned Closed; not enough information or otherwise never finished type: feature-IEEE Request to add new feature, described in IEEE 1800 type: feature-non-IEEE Request to add new feature, outside IEEE 1800

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Author Name: Sebastien Van Cauwenberghe
Original Redmine Issue: 380 from https://www.veripool.org
Original Date: 2011-03-01
Original Assignee: Sebastien Van Cauwenberghe

Work is ongoing on a separate branch
https://github.com/sebx86/VerilatorVHDL
@veripoolbot veripoolbot added effort: weeks Expect this issue to require weeks or more of invested effort to resolve type: feature-IEEE Request to add new feature, described in IEEE 1800 type: feature-non-IEEE Request to add new feature, outside IEEE 1800 labels Dec 22, 2019
@wsnyder wsnyder added the resolution: abandoned Closed; not enough information or otherwise never finished label Aug 30, 2022
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wsnyder commented Aug 30, 2022

Work on this has been idle for a long time without a "sponsor", closing.

@wsnyder wsnyder closed this as completed Aug 30, 2022
@wsnyder wsnyder closed this as not planned Won't fix, can't repro, duplicate, stale Aug 30, 2022
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effort: weeks Expect this issue to require weeks or more of invested effort to resolve resolution: abandoned Closed; not enough information or otherwise never finished type: feature-IEEE Request to add new feature, described in IEEE 1800 type: feature-non-IEEE Request to add new feature, outside IEEE 1800
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