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Add fuzzing infrastructure. #4

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Add fuzzing infrastructure. #4

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1425
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@1425 1425 commented Oct 12, 2019

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1425 commented Oct 12, 2019

I've migrated the Python 2 to Python 3. As far as using Python at all, I asked that here:

https://www.veripool.org/issues/1534-Verilator-Fuzzer-script#note-4

Although I didn't get a definitive answer.

Signed-off-by: Eric Rippey <rippey.e@gmail.com>
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1425 commented Oct 15, 2019

Travis CI is now complaining that my github username is not in the contributor list. Obviously a string of numbers is not my real name, and my name does appear in the contributors list. Do you have any advice on how to proceed?

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wsnyder commented Oct 15, 2019

@toddstrader can you please investigate this t_dist_contrib issue? Thanks.

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Can do. I'm just on my phone now, so I'll investigate more later but I think it's just that this test is looking for the commiter's name in CONTRIBUTORS. I think this also came up in the CMake PR. I believe someone just changed their name for this repo to their actual name to pass the test. Not sure if this was a local git config change or something done via GitHub.

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wsnyder commented Oct 16, 2019

Thanks, think the fundamentals are all here.

  1. Please add to internals.adoc a section on how to run it.
  2. Please add copyright headers at the top of every file e.g.
# DESCRIPTION: One line description of thingie......
#
# Copyright 2019-2019 by Wilson Snyder. This package is free software; you can
# redistribute it and/or modify it under the terms of either the GNU Lesser
# General Public License Version 3 or the Perl Artistic License Version 2.0.
######################################################################
  1. Please use // comments in the .cpp file
  2. Please put space after "#" before starting comment text.
  3. Please put space around "=" in python & cpp.

If you prefer I'll do 2-5 for you.

Then looks good to go.

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@1425 I believe if you just change your name to how it appears in docs/CONTRIBUTORS you'll pass the test. You can change this in your .gitconfig or with git config. This won't affect your GitHub name, but will change how you show up in the git log which is what matters for the test.

To test this I went the opposite way and changed my name so it would fail:
https://travis-ci.com/toddstrader/verilator-dev/jobs/246222215

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wsnyder commented Oct 17, 2019

Pushed with minor space/comment changes, thanks.

@wsnyder wsnyder closed this Oct 17, 2019
VarunKoyyalagunta added a commit to VarunKoyyalagunta/verilator that referenced this pull request Jul 13, 2022
Causes verilator to segfault when there's no DPI export, or produce bad
code when there is

$ ./test_regress/t/t_trace_split_cfuncs.pl -- debug --gdbbt

	Program received signal SIGSEGV, Segmentation fault.
	V3OutFormatter::puts (this=0x0, strg=0x5555562e2ba0 "\nvoid Vt_trace_split_cfuncs__Syms::_traceDump() {\n") at ../V3File.cpp:699
	699	    if (m_prependIndent && strg[0] != '\n') {
	#0  V3OutFormatter::puts (this=0x0, strg=0x5555562e2ba0 "\nvoid Vt_trace_split_cfuncs__Syms::_traceDump() {\n") at ../V3File.cpp:699
	verilator#1  0x00005555559798f1 in V3OutFormatter::puts (strg=..., this=<optimized out>) at /usr/include/c++/9/bits/basic_string.h:2304
	verilator#2  EmitCBaseVisitor::puts (str=..., this=0x7fffffffd8f0) at ../V3EmitCBase.h:58
	verilator#3  EmitCSyms::emitSymImp (this=this@entry=0x7fffffffd8f0) at ../V3EmitCSyms.cpp:928
	verilator#4  0x00005555559abe1e in EmitCSyms::visit (this=0x7fffffffd8f0, nodep=<optimized out>) at ../V3EmitCSyms.cpp:275
	verilator#5  0x000055555579324a in AstNetlist::accept (this=<optimized out>, v=...) at ../V3AstNodes.h:9348
	verilator#6  0x0000555555974795 in VNVisitor::iterate (nodep=0x555556255f80, this=0x7fffffffd8f0) at ../V3Ast.h:3245
	verilator#7  EmitCSyms::EmitCSyms (dpiHdrOnly=false, nodep=0x555556255f80, this=0x7fffffffd8f0) at ../V3EmitCSyms.cpp:369
	verilator#8  V3EmitC::emitcSyms (dpiHdrOnly=<optimized out>) at ../V3EmitCSyms.cpp:1071
	verilator#9  0x0000555555742333 in process () at ../Verilator.cpp:524
	verilator#10 0x0000555555742c7a in verilate (argString=...) at ../Verilator.cpp:607
	verilator#11 0x0000555555745319 in main (argc=<optimized out>, argv=<optimized out>, env=<optimized out>) at ../Verilator.cpp:733

$ ./test_regress/t/t_trace_split_cfuncs_dpi_export.pl

	vlt/t_trace_split_cfuncs_dpi_export: %Error: Exec of make failed: g++  -I.  -MMD -I/home/ubuntu/src/verilator/test_regress/../include -I/home/ubuntu/src/verilator/test_regress/../include/vltstd -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -DVM_TRACE_FST=0 -DVM_TRACE_VCD=1 -faligned-new -fcf-protection=none -Wno-bool-operation -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -std=gnu++14 -DVERILATOR=1 -DVL_DEBUG=1 -DTEST_OBJ_DIR=obj_vlt/t_trace_split_cfuncs_dpi_export -DVM_PREFIX=Vt_trace_split_cfuncs_dpi_export -DVM_PREFIX_INCLUDE="<Vt_trace_split_cfuncs_dpi_export.h>" -DVM_PREFIX_ROOT_INCLUDE="<Vt_trace_split_cfuncs_dpi_export___024root.h>" -DT_TRACE_SPLIT_CFUNCS_DPI_EXPORT   -O0 -c -o Vt_trace_split_cfuncs_dpi_export__main.o ../../obj_vlt/t_trace_split_cfuncs_dpi_export/Vt_trace_split_cfuncs_dpi_export__main.cpp
VarunKoyyalagunta added a commit to VarunKoyyalagunta/verilator that referenced this pull request Jul 13, 2022
Causes verilator to segfault when there's no DPI export, or produce bad
code when there is

$ ./test_regress/t/t_trace_split_cfuncs.pl -- debug --gdbbt

	Program received signal SIGSEGV, Segmentation fault.
	V3OutFormatter::puts (this=0x0, strg=0x5555562e2ba0 "\nvoid Vt_trace_split_cfuncs__Syms::_traceDump() {\n") at ../V3File.cpp:699
	699	    if (m_prependIndent && strg[0] != '\n') {
	#0  V3OutFormatter::puts (this=0x0, strg=0x5555562e2ba0 "\nvoid Vt_trace_split_cfuncs__Syms::_traceDump() {\n") at ../V3File.cpp:699
	verilator#1  0x00005555559798f1 in V3OutFormatter::puts (strg=..., this=<optimized out>) at /usr/include/c++/9/bits/basic_string.h:2304
	verilator#2  EmitCBaseVisitor::puts (str=..., this=0x7fffffffd8f0) at ../V3EmitCBase.h:58
	verilator#3  EmitCSyms::emitSymImp (this=this@entry=0x7fffffffd8f0) at ../V3EmitCSyms.cpp:928
	verilator#4  0x00005555559abe1e in EmitCSyms::visit (this=0x7fffffffd8f0, nodep=<optimized out>) at ../V3EmitCSyms.cpp:275
	verilator#5  0x000055555579324a in AstNetlist::accept (this=<optimized out>, v=...) at ../V3AstNodes.h:9348
	verilator#6  0x0000555555974795 in VNVisitor::iterate (nodep=0x555556255f80, this=0x7fffffffd8f0) at ../V3Ast.h:3245
	verilator#7  EmitCSyms::EmitCSyms (dpiHdrOnly=false, nodep=0x555556255f80, this=0x7fffffffd8f0) at ../V3EmitCSyms.cpp:369
	verilator#8  V3EmitC::emitcSyms (dpiHdrOnly=<optimized out>) at ../V3EmitCSyms.cpp:1071
	verilator#9  0x0000555555742333 in process () at ../Verilator.cpp:524
	verilator#10 0x0000555555742c7a in verilate (argString=...) at ../Verilator.cpp:607
	verilator#11 0x0000555555745319 in main (argc=<optimized out>, argv=<optimized out>, env=<optimized out>) at ../Verilator.cpp:733

$ ./test_regress/t/t_trace_split_cfuncs_dpi_export.pl

	vlt/t_trace_split_cfuncs_dpi_export: %Error: Exec of make failed: g++  -I.  -MMD -I/home/ubuntu/src/verilator/test_regress/../include -I/home/ubuntu/src/verilator/test_regress/../include/vltstd -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -DVM_TRACE_FST=0 -DVM_TRACE_VCD=1 -faligned-new -fcf-protection=none -Wno-bool-operation -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow      -std=gnu++14 -DVERILATOR=1 -DVL_DEBUG=1 -DTEST_OBJ_DIR=obj_vlt/t_trace_split_cfuncs_dpi_export -DVM_PREFIX=Vt_trace_split_cfuncs_dpi_export -DVM_PREFIX_INCLUDE="<Vt_trace_split_cfuncs_dpi_export.h>" -DVM_PREFIX_ROOT_INCLUDE="<Vt_trace_split_cfuncs_dpi_export___024root.h>" -DT_TRACE_SPLIT_CFUNCS_DPI_EXPORT   -O0 -c -o Vt_trace_split_cfuncs_dpi_export__main.o ../../obj_vlt/t_trace_split_cfuncs_dpi_export/Vt_trace_split_cfuncs_dpi_export__main.cpp
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