Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-03-31T20:03:34Z

Great step, good to have progress towards these tests.

t_sv_array_query.v is not a valid program - looks unfinished.

t_sv_enum_type_methods.v is not complete - header file doesn't exist.

t_sv_conditional needs the $vcd stuff commented out. When I comment out the "inside" line, I then get warnings - change casex to just case, and disable appropriate verilator warnings. Also the <= in the initial block should be =. Please file an enhancement bug on "inside" if you want this supported. Note in Verilator "unique case" is supported, but will only warn at runtime with the --assert option.

t_sv_chip gets errors on other simulators as there's no pinout_size or pinout (line 106) and please rename the .v and .pl to match t_sv_cpu_code.

BTW you don't need to modify the .pl files to turn on -language 1800-2009, it's the default. Also no need for the $vcd* stuff, the test driver script takes --trace and will generate the appropriate magic for each simulator.

When you think these look good, please check they pass on other simulators if possible, and even better can be synthesized. Thanks.

Original Redmine Comment
Author Name: Jeremy Bennett (@jeremybennett)
Original Date: 2012-04-12T10:21:28Z

I've fixed t_sv_array_query.v. It is now a proper test of array query functions.

t_sv_enum_type_methods.v should have picked up its header from the t_sv_cpu_code directory. However to make it standalone, I've just embedded the relevant enum.

I've taken the $vcd stuff out of t_sv_conditional - I didn't realize they were a VCS extension. I've got rid of the inside and adjusted casex. I'll file a separate enhancement request for "inside" support. I guess the <= inside initial blocks is a VCS extension.

I'll post separately for the whole CPU test. I've obviously missed one or more source files. I'll go back and dig those out. I'll rename the test as t_sv_cpu.{v,pl}, with the module code in the t_sv_cpu_code directory. Is this the renaming you intended?

I've changed the .pl scripts to eliminate -language 1800-2009.

It will take me a day or two to check these against a simulator supporting SystemVerilog. I'm posting these three tests, rather than wait until I can do this.

Provided as a patch against current git HEAD (commit 4a5e775).

Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-04-12T22:22:18Z

I committed t_array_query, t_sv_conditional and t_enum_methods. (Note renamed some.)

The enum one had this:

localparam t_pinid list = list.first;

You can't reference the same variable name on the left and right. Also .first isn't a constant expression. Generally one would reference a MAX enum value, so that is what I committed.

Original Redmine Comment
Author Name: Jeremy Bennett (@jeremybennett)
Original Date: 2012-05-16T11:08:37Z

I've done some more work on the enum, and will submit a separate issue with a new test to cover some of the enum operators

I've reworked the large CPU example. I believe this now works with VCS, and should act as a useful reference for testing SystemVerilog support. Please pull from https://github.com/jeremybennett/verilator/tree/sv-cpu.

Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-05-16T22:39:37Z

Merged to git.

Minor changes: removed trailing whitespace, removed some empty comment sections, added unsupported() call so passes on Verilator.