Author Name: Christian Gelinek
Original Redmine Issue: 528 from https://www.veripool.org
Original Date: 2012-06-29

Code:

module hold(Y);
inout Y;

wire io_wire;

  buf(weak0,weak1) I0(Y, io_wire);
  buf              I1(io_wire, Y);

endmodule // hold

Causes the following errors:

Unsupported: Verilog 1995 reserved word not implemented: weak0
Unsupported: Verilog 1995 reserved word not implemented: weak1

I am using it for @--lint-only@, with the @-language "1800-2005"@ option set.

The example Verilog code is part of a standard cell library, so there are lots of errors caused by this. I also tried to use the @-v standard_cells.v@ switch, hoping that Verilator would ignore the "contents" of the cells, but without success - Verilator stops at these errors, preventing me to see other warnings and errors in my own code.

If I don't include the standard_cells.v file in my call to Verilator, I get lots of warnings about my code, but (unsurprisingly) also complains about not being able to find the modules defined in standard_cells.v.