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incorrect %Error: Duplicate declaration of CELLINLINE #548

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veripoolbot opened this issue Aug 10, 2012 · 2 comments
Closed

incorrect %Error: Duplicate declaration of CELLINLINE #548

veripoolbot opened this issue Aug 10, 2012 · 2 comments
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resolution: fixed Closed; fixed

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Author Name: Alex Solomatnikov
Original Redmine Issue: 548 from https://www.veripool.org
Original Date: 2012-08-10

This used to work 3 months ago.

Test case (unfortunately, I could not reduce it any further):

`define TRUE 1 
`define FALSE 0 
`define NULL 0
`define EOF -1
`define MAX_N           256
`define MAX_W           256
`define COLON           ":"
`define DOT             "."
`define NEWL            "\n"
`define CR              8'h0D
`define SPACE           " "
`define TAB             "\t"
`define OPEN_BRACKET    "["
`define CLOSE_BRACKET   "]"
`define OFFSET          9
`define AWORD           8
`define EXT_STR         "ver"
`define PERCENT         "%"
`define MINUS           "-"
`define SEMICOLON       ";"
`define EQUAL           "="

module init;

function [8:1] tl;
     input [8:1] gc;
     reg [8:1] cc;

begin
     if ((gc >= 65) && (gc <= 90))
     begin
         cc = gc + 32;
         tl = cc;
     end
     else
         tl = gc;    
end
endfunction
     
task t1;
     input[`MAX_N*8 : 1] in_f;
     input wi;
     output [`MAX_N*8 : 1] out_f;
     reg [`MAX_N*8 : 1] in_f;
     reg [`MAX_N*8 : 1] out_f;
     reg [`MAX_N*8 : 1] b;
     reg [`MAX_W : 0] m_d1, m_d2;
     reg [8 : 1] c;
     reg [3 : 0] hex, tmp_char;
     reg [24 : 1] a_ra, d_ra;
     reg get_wi;
     reg get_de;
     reg get_d_ra;
     reg get_a_ra;
     reg wi_found;
     reg de_found;
     reg d_ra_found;
     reg a_ra_found;
     reg get_a_d_pairs;
     reg get_a;
     reg get_d;
     reg display_a;
     reg invalid_a;
     reg get_start_a;
     reg get_end_a;
     reg done;
     reg e_st;
     reg first_rec;
     reg last_rec;

     integer wi;
     integer m_wi, m_de;
     integer v;
     integer ifp, ofp, r, r2;
     integer i, j, k, m, n;
     
     integer off_addr, nn, a, tt, cc, aah, aal, dd, sum ;
     integer start_a, end_a;
     integer l_no;
     integer c_c;
     integer comment_with_percent_found;
     integer comment_with_double_minus_found;

begin

         if((in_f[4*8 : 1] == ".dat") || (in_f[4*8 : 1] == ".DAT"))
             out_f = in_f;
         else
         begin
             ifp = $fopen(in_f, "r");

             if (ifp == `NULL)
             begin
                 $display("E: cannot read %0s.", in_f);
                 done = `TRUE;
             end
         
             out_f = in_f;
             
             if((out_f[4*8 : 1] == ".mif") || (out_f[4*8 : 1] == ".MIF"))
                 out_f[3*8 : 1] = `EXT_STR;
             else
             begin
                 $display("E: Invalid input f %0s.", in_f);
                 done = `TRUE;
             end

             if (!done)
             begin            
                 ofp = $fopen(out_f, "w");

                 if (ofp == `NULL)
                 begin
                     $display("E : cannot write %0s.", out_f);
                     done = `TRUE;
                 end
             end
             
             while((!done) && (!e_st))
             begin : READER
 
                 r = $fgetc(ifp);

                 if (r == `EOF)
                 begin
                     if(!first_rec)
                     begin
                         e_st = `TRUE;
                         $display("WARNING: %0s, f is empty.", in_f);
                         $display ("Time: %0t  Instance: %m", $time);
                     end
                     else if (!get_a_d_pairs)
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d.", in_f, l_no);
                     end
                     else if(!last_rec)
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d.", in_f, l_no);
                     end
                     done = `TRUE;
                 end
                 else if ((r == `NEWL) || (r == `CR))
                 begin                    
                     if ((b == "contentbegin") && (get_a_d_pairs == `FALSE))
                     begin
                         get_a_d_pairs = `TRUE;
                         get_a = `TRUE;
                         b = "";
                     end
                     else if (b == "content")
                     begin
                     end
                     else
                     if (b != "")
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Invalid record.", in_f, l_no);
                         disable READER;
                     end
                     l_no = l_no +1;
                     
                 end
                 else if ((r == `SPACE) || (r == `TAB))
                 begin
                 end
                 else if (r == `PERCENT)
                 begin
                     r = $fgetc(ifp);

                     while ((r != `PERCENT) && (r != `NEWL) && (r != `CR))
                     begin
                         r = $fgetc(ifp);                      
                     end

                     if ((r == `NEWL) || (r == `CR))
                     begin
                         l_no = l_no +1;

                         if ((b == "contentbegin") && (get_a_d_pairs == `FALSE))
                         begin
                             get_a_d_pairs = `TRUE;
                             get_a = `TRUE;
                             b = "";
                         end
                     end
                 end
                 else if (r == `MINUS)
                 begin
                     r = $fgetc(ifp);
                     if (r == `MINUS)
                     begin
                         r = $fgetc(ifp);
     
                         while ((r != `NEWL) && (r != `CR))
                         begin
                             r = $fgetc(ifp);
                             
                         end
     
                         if ((r == `NEWL) || (r == `CR))
                         begin
                             l_no = l_no +1;

                             if ((b == "contentbegin") && (get_a_d_pairs == `FALSE))
                             begin
                                 get_a_d_pairs = `TRUE;
                                 get_a = `TRUE;
                                 b = "";
                             end
                         end
                     end
                     else
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Invalid record.", in_f, l_no);
                         done = `TRUE;
                         disable READER;
                     end
                 end
                 else if (r == `EQUAL)
                 begin
                     if (b == "wi")
                     begin
                         if (wi_found == `FALSE)
                         begin
                             get_wi = `TRUE;
                             b = "";
                         end
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d.", in_f, l_no);
                         end
                     end
                     else if (b == "de")
                     begin
                         get_de = `TRUE;
                         b = ""; 
                     end
                     else if (b == "d_ra")
                     begin
                         get_d_ra = `TRUE;
                         b = "";
                     end
                     else if (b == "a_ra")
                     begin
                         get_a_ra = `TRUE;
                         b = "";
                     end
                     else
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, (%0s).", in_f, l_no, b);
                     end
                 end
                 else if (r == `COLON)
                 begin
                     if (!get_a_d_pairs)
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Missing `content begin` statement.", in_f, l_no);
                     end
                     else if (invalid_a == `TRUE)
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Invalid d record.", in_f, l_no);
                     end
                     begin
                         get_a = `FALSE;
                         get_d = `TRUE;
                         display_a = `TRUE;
                     end
                 end
                 else if (r == `DOT)
                 begin
                     r = $fgetc(ifp);
                     if (r == `DOT)
                     begin
                         if (get_start_a == `TRUE)
                         begin
                             start_a = a;
                             a = 0; 
                             get_start_a = `FALSE;
                             get_end_a = `TRUE;
                         end
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                     end
                     else
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Invalid record.", in_f, l_no);
                         done = `TRUE;
                         disable READER;
                     end
                 end
                 else if (r == `OPEN_BRACKET)
                 begin
                     get_start_a = `TRUE;
                 end
                 else if (r == `CLOSE_BRACKET)
                 begin
                     if (get_end_a == `TRUE)
                     begin
                         end_a = a;
                         a = 0; 
                         get_end_a = `FALSE;
                     end
                     else
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Invalid record.", in_f, l_no);
                         done = `TRUE;
                         disable READER;
                     end
                 end                
                 else if (r == `SEMICOLON)
                 begin
                     if (get_wi == `TRUE)
                     begin
                         wi_found = `TRUE;
                         m_wi = v;
                         v = 0;
                         get_wi = `FALSE;
                     end
                     else if (get_de == `TRUE)
                     begin
                         de_found = `TRUE;
                         m_de = v;
                         v = 0;
                         get_de = `FALSE;
                     end
                     else if (get_d_ra == `TRUE)
                     begin
                         d_ra_found = `TRUE;
                         get_d_ra = `FALSE;

                         if ((b == "bin") || (b == "oct") || (b == "dec") || (b == "uns") ||
                             (b == "hex"))
                         begin
                             d_ra = b[24 : 1];
                         end
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid assignment (%0s) to d_ra.", in_f, l_no, b);
                         end
                         b = "";
                     end
                     else if (get_a_ra == `TRUE)
                     begin
                         a_ra_found = `TRUE;
                         get_a_ra = `FALSE;

                         if ((b == "bin") || (b == "oct") || (b == "dec") || (b == "uns") ||
                             (b == "hex"))
                         begin
                             a_ra = b[24 : 1];
                         end
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid assignment (%0s) to a ra.", in_f, l_no, b);
                         end
                         b = "";
                     end
                     else if (b == "end")
                     begin
                         if (get_a_d_pairs == `TRUE)
                         begin
                             last_rec = `TRUE;
                             b = "";
                         end
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Missing `content begin` statement.", in_f, l_no);
                         end
                     end
                     else if (get_d == `TRUE)
                     begin
                         get_a = `TRUE;
                         get_d = `FALSE;
                         b = "";
                         c_c = 0;
                         
                         if (start_a != end_a)
                         begin
                             for (a = start_a; a <= end_a; a = a+1)
                             begin
                                 $fdisplay(ofp,"@%0h", a);
                                 
                                 for (i = m_wi -1; i >= 0; i = i-1 )
                                 begin
                                     hex[(i % 4)] =  m_d1[i];
                                     
                                     if ((i % 4) == 0)
                                     begin
                                         $fwrite(ofp, "%0h", hex);
                                         hex = 0;
                                     end
                                 end
         
                                 $fwrite(ofp, "\n");
                             end
                             start_a = 0;
                             end_a = 0;
                             a = 0;
                             hex = 0;
                             m_d1 = {(`MAX_W+1) {1'b0}};
                         end
                         else
                         begin
                             if (display_a == `TRUE)
                             begin
                                 $fdisplay(ofp,"@%0h", a);
                                 display_a = `FALSE;
                             end
                             
                             for (i = m_wi -1; i >= 0; i = i-1 )
                             begin
                                 hex[(i % 4)] =  m_d1[i];
                                 
                                 if ((i % 4) == 0)
                                 begin
                                     $fwrite(ofp, "%0h", hex);
                                     hex = 0;
                                 end
                             end
     
                             $fwrite(ofp, "\n");                      
                             a = 0;
                             hex = 0;
                             m_d1 = {(`MAX_W+1) {1'b0}};
                         end
                     end
                     else
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Invalid assigment.", in_f, l_no);
                     end
                 end
                 else if ((get_wi == `TRUE) || (get_de == `TRUE))
                 begin
                     if ((r >= "0") && (r <= "9"))
                         v = (v * 10) + (r - 'h30);
                     else
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Invalid assignment to wi/de.", in_f, l_no);
                     end
                 end
                 else if (get_a == `TRUE)
                 begin
                     if (a_ra == "hex")
                     begin
                         if ((r >= "0") && (r <= "9"))
                             v = (r - 'h30);
                         else if ((r >= "A") && (r <= "F"))
                             v = 10 + (r - 'h41);
                         else if ((r >= "a") && (r <= "f"))
                             v = 10 + (r - 'h61);
                         else
                         begin
                             invalid_a = `TRUE;
                         end
                             
                         a = (a * 16) + v;
                     end
                     else if ((a_ra == "dec"))
                     begin
                         if ((r >= "0") && (r <= "9"))
                             v = (r - 'h30);
                         else
                         begin
                             invalid_a = `TRUE;
                         end
                             
                         a = (a * 10) + v;
                     end
                     else if (a_ra == "uns")
                     begin
                         if ((r >= "0") && (r <= "9"))
                             v = (r - 'h30);
                         else
                         begin
                             invalid_a = `TRUE;
                         end
                             
                         a = (a * 10) + v; 
                     end
                     else if (a_ra == "bin")
                     begin
                         if ((r >= "0") && (r <= "1"))
                             v = (r - 'h30);
                         else
                         begin
                             invalid_a = `TRUE;
                         end
                             
                         a = (a * 2) + v;
                     end
                     else if (a_ra == "oct")
                     begin
                         if ((r >= "0") && (r <= "7"))
                             v = (r - 'h30);
                         else
                         begin
                             invalid_a = `TRUE;
                         end
                             
                         a = (a * 8) + v;
                     end
                     
                     {tmp_char,b} = {b, c};                    
                 end
                 else if (get_d == `TRUE)
                 begin                    
                     c_c = c_c +1;

                     if (d_ra == "hex")
                     begin
                         if ((r >= "0") && (r <= "9"))
                             v = (r - 'h30);
                         else if ((r >= "A") && (r <= "F"))
                             v = 10 + (r - 'h41);
                         else if ((r >= "a") && (r <= "f"))
                             v = 10 + (r - 'h61);
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid d record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                             
                         m_d1 = (m_d1 * 16) + v;
                     end
                     else if ((d_ra == "dec"))
                     begin
                         if ((r >= "0") && (r <= "9"))
                             v = (r - 'h30);
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid d record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                             
                         m_d1 = (m_d1 * 10) + v;
                     end
                     else if (d_ra == "uns")
                     begin
                         if ((r >= "0") && (r <= "9"))
                             v = (r - 'h30);
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid d record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                             
                         m_d1 = (m_d1 * 10) + v; 
                     end
                     else if (d_ra == "bin")
                     begin
                         if ((r >= "0") && (r <= "1"))
                             v = (r - 'h30);
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid d record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                             
                         m_d1 = (m_d1 * 2) + v;
                     end
                     else if (d_ra == "oct")
                     begin
                         if ((r >= "0") && (r <= "7"))
                             v = (r - 'h30);
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid d record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                             
                         m_d1 = (m_d1 * 8) + v;
                     end
                 end
                 else
                 begin
                     first_rec = `TRUE;
                     
                     if ((r >= 65) && (r <= 90))
                         c = r;
                     else
                         c = r;

                     {tmp_char,b} = {b, c};                    
                 end
             end
             $fclose(ifp);
             $fclose(ofp);
         end
end
endtask

task t2;
     input[`MAX_N*8 : 1] in_f;
     input wi;
     output [`MAX_N*8 : 1] out_f;
     reg [`MAX_N*8 : 1] in_f;
     reg [`MAX_N*8 : 1] out_f;
     reg [8:1] c;
     reg [3:0] hex, tmp_char;
     reg done;
     reg e_st;
     reg first_rec;
     reg last_rec;
     reg first_normal_record;
     reg is_word_a_format;

     integer wi;
     integer ifp, ofp, r, r2;
     integer i, j, k, m, n;
     
     integer off_addr, nn, aaaa, aaaa_pre, tt, cc, aah, aal, dd, sum ;
     integer l_no;
     integer divide_factor;

begin

         if((in_f[4*8 : 1] == ".dat") || (in_f[4*8 : 1] == ".DAT"))
             out_f = in_f;
         else
         begin
             ifp = $fopen(in_f, "r");
             if (ifp == `NULL)
             begin
                 $display("E: cannot read %0s.", in_f);
                 done = `TRUE;
             end
         
             out_f = in_f;
             
             if((out_f[4*8 : 1] == ".hex") || (out_f[4*8 : 1] == ".HEX"))
                 out_f[3*8 : 1] = `EXT_STR;
             else
             begin
                 $display("E: Invalid input f %0s.", in_f);
                 done = `TRUE;
             end
             
             if (!done)
             begin            
                 ofp = $fopen(out_f, "w");
                 if (ofp == `NULL)
                 begin
                     $display("E : cannot write %0s.", out_f);
                     done = `TRUE;
                 end
             end
             
             while((!done) && (!e_st))
             begin : READER
                 r = $fgetc(ifp);
         
                 if (r == `EOF)
                 begin
                     if(!first_rec)
                     begin
                         e_st = `TRUE;
                         $display("WARNING: %0s is empty.", in_f);
                         $display ("Time: %0t  Instance: %m", $time);
                     end
                     else if(!last_rec)
                     begin
                         e_st = `TRUE;
                         $display("E: %0s, l %0d, Missing the last record.", in_f, l_no);
                     end
                 end
                 else if (r == `COLON)
                 begin
                     for (i = 0; i < 2; i = i+1)
                     begin
                         r = $fgetc(ifp);
                         
                         if ((r >= "0") && (r <= "9"))
                             nn = (nn * 16) + (r - 'h30);
                         else if ((r >= "A") && (r <= "F"))
                             nn = (nn * 16) + 10 + (r - 'h41);
                         else if ((r >= "a") && (r <= "f"))
                             nn = (nn * 16) + 10 + (r - 'h61);
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                     end
         
                     for (i = 0; i < 4; i = i+1)
                     begin
                         r = $fgetc(ifp);
                         
                         if ((r >= "0") && (r <= "9"))
                             hex = (r - 'h30);
                         else
                         begin
                             e_st = `TRUE;
                             $display("E: %0s, l %0d, Invalid record.", in_f, l_no);
                             done = `TRUE;
                             disable READER;
                         end
                     end
                     
                     for (i = 0; i < 2; i = i+1)
                     begin
                         r = $fgetc(ifp);
                         
                         if ((r >= "0") && (r <= "9"))
                             tt = (tt * 16) + (r - 'h30);
                         else
                         begin
                             e_st = `TRUE;
                             done = `TRUE;
                             disable READER;
                         end
                     end
         
                     if((tt == 2) && (nn != 2) )
                     begin
                         e_st = `TRUE;
                     end
                     else
                     begin
         
                         sum = nn + aah + aal + tt ; 
                    
                         case(tt)
                             8'h00 :
                             begin
                                 while (i < nn)
                                 begin
                                     $fdisplay(ofp,"@%0h", (aaaa + off_addr)/divide_factor);

                                     for (j = 1; j <= k; j = j +1)
                                     begin
                                         if ((k - j +1) > nn)
                                         begin
                                             for(m = 1; m <= 2; m= m+1)
                                             begin
                                                 if((((k-j)*8) + ((3-m)*4) - wi) < 4)
                                                     $fwrite(ofp, "0");
                                             end
                                         end
                                         else
                                         begin
                                             for(m = 1; m <= 2; m= m+1)
                                             begin                    
                                                 r = $fgetc(ifp);
                             
                                                 if ((r >= "0") && (r <= "9"))
                                                     hex = (r - 'h30);
                                                 else
                                                 begin
                                                     e_st = `TRUE;
                                                     done = `TRUE;
                                                     disable READER;
                                                 end
                                             end
                                         end
                                     end
                                     $fwrite(ofp, "\n");
         
                                     i = i + k;
                                     aaaa = aaaa + 1;
                                 end
                             end
                         endcase
                         
                     end
                 end
             end
             $fclose(ifp);
             $fclose(ofp);
         end
end
endtask
endmodule

module ram1();
    init mem();
endmodule

module ram2();
    init mem();
endmodule

module s_reg_f();
    ram1 u_ram1();
endmodule

module s();
    s_reg_f u_s_reg_f();
endmodule

module a1();
  ram2 u_ram2();
endmodule


module a2();
  ram2 u_ram2();
endmodule

module a ();
    a1 u_a1();
    a2 u_a2();
endmodule

module test();
    a u_a();
    s u_s();
endmodule

New verilator:

~/verilator/verilator_bin -sv --cc -Wno-fatal --error-limit 1000 --dump-treei 9 test.v --top-module test
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_01_linkcells.dot
%Warning-WIDTH: test.v:150: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Warning-WIDTH: test.v:156: Operator NEQ expects 2048 bits on the RHS, but RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:172: Operator NEQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:185: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:177: Operator EQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:196: Operator NEQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:210: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:202: Operator EQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:229: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:240: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:245: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:250: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:355: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:372: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:379: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:391: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:522: Operator ASSIGN expects 2052 bits on the Assign RHS, but Assign RHS's CONCAT generates 2056 bits.
%Warning-WIDTH: test.v:544: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:558: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:572: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:586: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:600: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:608: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS's VARREF 'r' generates 32 bits.
%Warning-WIDTH: test.v:610: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS's VARREF 'r' generates 32 bits.
%Warning-WIDTH: test.v:612: Operator ASSIGN expects 2052 bits on the Assign RHS, but Assign RHS's CONCAT generates 2056 bits.
%Warning-WIDTH: test.v:144: Operator EQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:721: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SUB generates 32 bits.
%Warning-WIDTH: test.v:778: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SUB generates 32 bits.
%Warning-WIDTH: test.v:754: Operator CASE expects 32 bits on the Case Item, but Case Item's CONST '8'h0' generates 8 bits.
%Error: test.v:678: Duplicate declaration of CELLINLINE 'READER': READER
%Error: test.v:120: ... Location of original declaration
%Error: Exiting due to 1 error(s)

Old:

/tools/verilator/verilator-3.833/bin/verilator_bin -sv --cc -Wno-fatal --error-limit 1000 --dump-treei 9 test.v --top-module test
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_01_linkcells.dot
%Warning-WIDTH: test.v:150: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Warning-WIDTH: test.v:156: Operator NEQ expects 2048 bits on the RHS, but RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:172: Operator NEQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:185: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:177: Operator EQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:196: Operator NEQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:210: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:202: Operator EQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:229: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:240: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:245: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:250: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:355: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:372: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:379: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:391: Operator ASSIGN expects 2048 bits on the Assign RHS, but Assign RHS's CONST '?1?h0' generates 1 bits.
%Warning-WIDTH: test.v:522: Operator ASSIGN expects 2052 bits on the Assign RHS, but Assign RHS's CONCAT generates 2056 bits.
%Warning-WIDTH: test.v:544: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:558: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:572: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:586: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:600: Operator ADD expects 257 bits on the RHS, but RHS's VARREF 'v' generates 32 bits.
%Warning-WIDTH: test.v:608: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS's VARREF 'r' generates 32 bits.
%Warning-WIDTH: test.v:610: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS's VARREF 'r' generates 32 bits.
%Warning-WIDTH: test.v:612: Operator ASSIGN expects 2052 bits on the Assign RHS, but Assign RHS's CONCAT generates 2056 bits.
%Warning-WIDTH: test.v:144: Operator EQ expects 32 bits on the RHS, but RHS's CONST '8'hd' generates 8 bits.
%Warning-WIDTH: test.v:721: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SUB generates 32 bits.
%Warning-WIDTH: test.v:778: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SUB generates 32 bits.
%Warning-WIDTH: test.v:754: Operator CASE expects 32 bits on the Case Item, but Case Item's CONST '8'h0' generates 8 bits.
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_40_task_call.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_55_gate_simp.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_56_gate_opt.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_63_orderg_pre.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_64_orderg_acyc.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_65_orderg_order.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_66_orderg_domain.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_67_ordermv_simpl.dot
dot -Tpdf -o ~/a.pdf obj_dir/Vtest_68_orderg_done.dot
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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-08-10T23:40:43Z

Your test case was long because it was related to inlining, any large number of statements was needed to see it.

Fixed in git towards 3.841.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-09-04T00:15:01Z

In 3.841.

@veripoolbot veripoolbot added the resolution: fixed Closed; fixed label Dec 22, 2019
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