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Referencing SystemVerilog struct field of a member of an array of structs #566

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veripoolbot opened this issue Oct 9, 2012 · 3 comments
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resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800

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Author Name: Julius Baxter (@juliusbaxter)
Original Redmine Issue: 566 from https://www.veripool.org
Original Date: 2012-10-09
Original Assignee: Wilson Snyder (@wsnyder)


The following code throws an error like it's a hierarchical reference, however it's just accessing a field of a struct, which is in an array and being accessed via a variable in a loop.

package TEST_TYPES;
    typedef struct packed {
       logic   stuff;     
    } a_struct;
endpackage // TEST_TYPES

module testmodule(a_out);
    parameter n = 4;
    output TEST_TYPES::a_struct [n-1:0] a_out;
    always_comb
      begin
     for (int i=0;i<n;i++)
       a_out[i].stuff = '0;
      end
endmodule // testmodule

The error generated is:

%Error: testcase.sv:13: Unsupported: Non-constant inside []'s in the cell part of a dotted reference
%Error: Exiting due to 1 error(s)

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-11-03T13:17:55Z


Fixed in git towards 3.842.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-11-03T13:18:30Z


BTW unfortunately expect other issues related to mixing structs and arrays.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-11-04T00:25:04Z


In 3.842.

@veripoolbot veripoolbot added resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800 labels Dec 22, 2019
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Labels
resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800
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