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Use of package qualified parameters #586

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veripoolbot opened this issue Dec 2, 2012 · 4 comments
Closed

Use of package qualified parameters #586

veripoolbot opened this issue Dec 2, 2012 · 4 comments
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resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800

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Author Name: Jeremy Bennett (@jeremybennett)
Original Redmine Issue: 586 from https://www.veripool.org
Original Date: 2012-11-29
Original Assignee: Wilson Snyder (@wsnyder)


The following is accepted by VCS, and I believe it to be valid System Verilog:

package params;
    parameter P = 7;
endpackage

module test (/*AUTOARG*/
	     // Inputs
	     input logic [params::P:0] val	// Fully qualified parameter
    );

endmodule

With Verilator, this fails with:

%Error: t/t_package_param.v:37: syntax error, unexpected ':', expecting '(' or '.'
%Error: Exiting due to 1 error(s)
%Error: Command Failed /home/jeremy/gittrees/verilator/verilator_bin --prefix Vt_package_param --x-assign unique -cc -Mdir obj_dir/t_package_param --debug-check -f input.vc t/t_package_param.v

(where line 37 is the line declaring @input logic ...@ )

I'll start investigating what is needed to extend Verilator to support this SystemVerilog syntax. I'd welcome any hints on this.

A test case for this can be pulled from branch sv-package-param at git@github.com:jeremybennett/verilator.git

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-12-03T03:08:31Z


This parses in Verilog-Perl. I looked at the parser differences and package scope isn't properly supported in expressions, it will be easier if I reconcile it.

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Original Redmine Comment
Author Name: Jeremy Bennett (@jeremybennett)
Original Date: 2012-12-03T08:47:10Z


Hi Wilson - Thanks for picking this up - Jeremy

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-12-31T22:07:31Z


Fixed in git towards 3.844. This required a fairly large parser change, so it might make some dotted reference (a.b.c) handling unstable, though everything I have passes.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2013-01-10T03:26:29Z


In 3.844.

@veripoolbot veripoolbot added resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800 labels Dec 22, 2019
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resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800
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