Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Support for export in package declarations #592

Closed
veripoolbot opened this issue Dec 17, 2012 · 4 comments
Closed

Support for export in package declarations #592

veripoolbot opened this issue Dec 17, 2012 · 4 comments
Labels
resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800

Comments

@veripoolbot
Copy link
Contributor

Author Name: Jeremy Bennett (@jeremybennett)
Original Redmine Issue: 592 from https://www.veripool.org
Original Date: 2012-12-17

In the following code, the "export" statement is needed to ensure PARAM2 is visible when pkg1 is imported.

package pkg2;
    parameter PARAM2 = 16;
endpackage // pkg2

package pkg1;
    import pkg2::*;
    export pkg2::*;			// So we can see PARAM2 if importing.

    parameter PARAM1 = 8;
endpackage // pkg1

module t (/*AUTOARG*/
    // Inputs
    clk
    );
    input clk;

    import pkg1::*;

    reg [PARAM1:0] bus1;
    reg [PARAM2:0] bus2;
endmodule

At present this is not supported by Verilator, and this is request to add that support. Or I should welcome some hints so I could add it myself.

Please pull the testcase from branch package-export at git@github.com:jeremybennett/verilator.git
@veripoolbot
Copy link
Contributor Author

Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-12-18T01:27:24Z

The mis-importing is fixed in git towards 3.844.

From what I can see VCS doesn't support export, does another major simulator?

@veripoolbot
Copy link
Contributor Author

Original Redmine Comment
Author Name: Jeremy Bennett (@jeremybennett)
Original Date: 2012-12-18T08:30:01Z

This is not a priority at the moment. As you note, VCS does not support it. I discovered it only when preparing the example for Issue 591. Something to file for the future.

@veripoolbot
Copy link
Contributor Author

Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2012-12-31T22:09:23Z

As "export" is unsupported in other sims do you mind if we close it until we get another request?

@veripoolbot
Copy link
Contributor Author

Original Redmine Comment
Author Name: Jeremy Bennett (@jeremybennett)
Original Date: 2013-01-01T09:41:40Z

I'm happy to close it. Just recorded it here as a marker for something we may want in the future.

@veripoolbot veripoolbot added resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800 labels Dec 22, 2019
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
resolution: fixed Closed; fixed type: feature-IEEE Request to add new feature, described in IEEE 1800
Projects
None yet
Milestone
No milestone
Development

No branches or pull requests
1 participant
@veripoolbot