Clock gated signals not synchronised if used as a logical input
When a clock gated signal is used as a logical input it loses it's synchronization with the input clock. This is rarely a problem as the clock is only sensed with edge sensitive always statements, but if it is ever an input to logic it becomes unsynchronized again.
Test case attached. Removing the "$display("Clock is %d", clk2);" line makes the test pass again.
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