Some else-if branches don't have coverage number associated #727
Comments
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Original Redmine Comment When I run the code you provide I get totally different coverage points. Anyhow looking just at the verilog file you provided what is a case/if/else that is not properly covered? |
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Original Redmine Comment All the verilog case/if/else statement is properly covered. has no coverage number inserted. Its child branches have coverage number 51 and 52 but it itself doesn't have any coverage number. |
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Original Redmine Comment All the verilog case/if/else statement is properly covered. This branch has no coverage number inserted. Its child branches have coverage number 51 and 52 but it itself doesn't have any coverage number. |
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Original Redmine Comment Thanks for explaining. This is fixed in git towards 3.857. |
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Original Redmine Comment In 3.860. |
veripoolbot
added
area: wrong runtime result
Author Name: Sharad Bagri
Original Redmine Issue: 727 from https://www.veripool.org
Original Date: 2014-03-26
Original Assignee: Wilson Snyder (@wsnyder)
I am using the verilator generated c++ code for tracking how many branches of the code has been reached. From what I understand, Verilator generates coverage number based on number of conditions in the verilog code. Sometimes number of branches in the C++ code may not be equal to the number of conditions in verilog code. In such case, some branches of the C++ code is not numbered. It would be good for my case, if all branches of C++ code is numbered.
This happens when verilog file has if, else if cases.
I am attaching a verilog and its corresponding C++ file formatted a little bit for aesthetics.
In this case branch between 60 and 51 is not numbered. i.e the branch inside and 60 and outside of 51.
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