Verilator 3.856 errors on reserved words as struct members Verilator 3.850 did not #741
Comments
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Original Redmine Comment Fixed in git towards 3.857. |
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Original Redmine Comment Ah, I had assumed you were using -Wno-RSVDWORD, which before this fix was fatal, unlike other non-structure-member reserved words (the bug). You will need to use that flag, or // verilator lint_off RSVDWORD, because "vector" is indeed the name of a standard C++ class and is potentially hazardous to the output code (even though in this case due to your choice of options it got optimized away before hitting C++). Verilator will replace "vector" with another generated name, but if you are hooking up to other C code you'll need to be aware of this rename, thus the error. |
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Original Redmine Comment In 3.860. |
veripoolbot
added
area: parser
Author Name: Chris Randall
Original Redmine Issue: 741 from https://www.veripool.org
Original Date: 2014-04-15
Original Assignee: Wilson Snyder (@wsnyder)
I think newer versions of Verilator are making a check on variable names that are part of structs incorrectly; see example below:
cat test.sv
typedef struct packed {
logic[31:0] vector;
} test;
module m;
test t;
always_comb
t.vector = 1;
endmodule
verilator --version
Verilator 3.856 2014-03-11 rev verilator_3_855-19-g749ff02
verilator -cc test.sv
%Error: test.sv:3: Symbol matching C++ common word reserved word reached emitter, should have hit SYMRSVDWORD: 'vector'
%Error: Exiting due to 1 error(s)
%Error: Command Failed /tools/verilator/3.856/x86_64-rhel5/bin/verilator_bin -cc test.sv
verilator --version
Verilator 3.850 2013-06-02 rev verilator_3_848-1-g7a65df7
verilator -cc test.sv
<fine..>
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