Verilator bug in sign extending special boolean expression #768
Labels
area: wrong runtime result
Issue involves an incorrect runtine result from Verilated model
resolution: fixed
Closed; fixed
Author Name: Clifford Wolf (@cliffordwolf)
Original Redmine Issue: 768 from https://www.veripool.org
Original Date: 2014-05-15
Original Assignee: Wilson Snyder (@wsnyder)
This should set y=4'b1111 but Verilator d7e4bc1 sets y=4'b0001 instead.
Only slight modifications in the expression make the problem disappear.
Self-contained test case:
http://svn.clifford.at/handicraft/2014/verilatortest/test015.v
http://svn.clifford.at/handicraft/2014/verilatortest/test015.cc
http://svn.clifford.at/handicraft/2014/verilatortest/test015.sh
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