Author Name: Andrea Foletto
Original Redmine Issue: 78 from https://www.veripool.org
Original Date: 2009-04-08
Original Assignee: Wilson Snyder (@wsnyder)

Hi I got an error using the task and passing the data. It seems verilator doesn't like the structure that I used.
The file aoa.v contain the basic task (it's cut from a bigger source file) and here the error that I got:

verilator -cc aoa.v
%Error: aoa.v:34: Assigning to input variable: DDIFF_B
%Error: aoa.v:34: Assigning to input variable: DDIFF_B
%Error: aoa.v:34: Assigning to input variable: DDIFF_B
%Error: aoa.v:34: Assigning to input variable: DDIFF_B
%Error: Exiting due to 4 warning(s)
%Error: Command Failed verilator_bin -cc aoa.v

I modified the code assigning some operation to temporary register (tmp in file aoa_2.v) and now I got another error that I don't understand (blocked and non-blocking assigments):

verilator -cc aoa_2.v
%Warning-WIDTH: aoa_2.v:35: Operator DIV expects 9 bits on the RHS, but RHS's CONST generates 5 bits.
%Warning-WIDTH: Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Warning-WIDTH: aoa_2.v:36: Operator TASKREF expects 8 bits on the Function Argument, but Function Argument's VARREF generates 9 bits.
%Error-BLKANDNBLK: aoa_2.v:22: Unsupported: Blocked and non-blocking assignments to same variable: AOA_B
%Error: Exiting due to 3 warning(s)
%Error: Command Failed verilator_bin -cc aoa_2.v

Can you help me ?
Thanks Andrea