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ommiting parameter keyword #810

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veripoolbot opened this issue Aug 25, 2014 · 4 comments
Closed

ommiting parameter keyword #810

veripoolbot opened this issue Aug 25, 2014 · 4 comments
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@wsnyder
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area: parser Issue involves SystemVerilog parsing resolution: fixed Closed; fixed

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Author Name: Iztok Jeras (@jeras)
Original Redmine Issue: 810 from https://www.veripool.org
Original Date: 2014-08-25
Original Assignee: Wilson Snyder (@wsnyder)

In the SystemVerilog language it is possible to ommit the parameter keyword in parameter lists. See section "6.20.1 Parameter declaration syntax" from the 1800-2012 standard. This feature is not yet supported by Verilator.

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Iztok Jeras
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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-08-25T19:55:41Z

Please post an example, this should already work, e.g. "module #(P=1) (input a); endmodule"

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Original Redmine Comment
Author Name: Iztok Jeras (@jeras)
Original Date: 2014-08-26T22:05:50Z

Hi Wilson,

The parameters were sized, here are a few examples, but I am not able to test this right this week:

module #(
int unsigned DATA_WIDTH = 32,
logic [DW-1:0] DEFAULT = '0,
bit REGISTERED = 1'b1
)(
input a
);
endmodule

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-08-27T11:58:25Z

Ah, thanks I understand now.

Fixed in git towards 3.864.

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-09-21T13:11:12Z

In 3.864.

@veripoolbot veripoolbot added area: parser Issue involves SystemVerilog parsing resolution: fixed Closed; fixed labels Dec 22, 2019
tgorochowik added a commit to antmicro/verilator that referenced this issue Feb 29, 2024
@tgorochowik
Merge pull request verilator#810 from hzeller/20220924-fix-shellscrip…
3a63241 
…t-bash

Fix hardcoded path to /bin/bash -> /usr/bin/env bash
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area: parser Issue involves SystemVerilog parsing resolution: fixed Closed; fixed
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