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Conditional impure function always being executed #963
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Original Redmine Comment Typo: I did NOT define any "pure" key word when declaring DPI-C. |
Original Redmine Comment This is not a scheduling problem. Instead the issue is introduced during optimization. Verilator will try to simplify
into
And then in your code since @Valid == 1'b0@ Verilator further simplify the code into
The second optimization is the issue here. In C++, the @&@ operator is actually eager operator [[ https://en.wikipedia.org/wiki/Short-circuit_evaluation]] which means the @dpi_function@ will be always called. |
Original Redmine Comment Thanks for the rewording. Surely I am not fully aware of the process of synthesis. I would suggest Verilator treats all DPI functions as impure unless a "pure" key word is defined. The SystemVerilog does define this key word to indicate the DPI function is pure, isn't it? Hopefully it is not a big trouble. |
Original Redmine Comment Actually, if
really follows the short cut rule, when valid is 0, dpi_function() does not need to be evaluated? |
Original Redmine Comment @&@ is an eager operator instead of short-circuit operator in C++. @&&@ is a short-circuit operator. |
Original Redmine Comment Fixed in git towards 3.877. Note that the short-circuit operator handing e.g. &&, still does not generally work, so do not rely on this. However if to conditional was intended to be safe. |
Original Redmine Comment In 3.878. |
Author Name: Wei Song
Original Redmine Issue: 963 from https://www.veripool.org
Original Date: 2015-09-08
Original Assignee: Wilson Snyder (@wsnyder)
I have a code similar like this:
Looking at the compiled code, this always block behave like this
While this is OK if the function is a pure function.
However, the function here is a DPI function which has side-effect on the C++ side.
I did define any "pure" key word when declaring DPI-C.
Is there a way to disable this scheduling?
I found if I add something, like a $display() in the if block, the function is scheduled OK.
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