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# Project Status Priority Subject Assignee Updated
1 TestProject Closed Normal Example issue 04/16/2008 11:13 PM
604 Verilator Closed Normal -x-initial-edge breaks with logic bug fix Jeremy Bennett 01/17/2013 12:21 PM
218 Verilog-mode Closed Normal pure virtual indentation Michael McNamara 06/03/2010 12:40 AM
180 Verilog-mode Closed Normal Struct pack signed misindents Michael McNamara 12/10/2009 11:48 AM
95 Verilog-mode Closed Normal Attributes indent incorrectly Michael McNamara 03/31/2010 05:28 PM
1657 Verilator New Normal Investigate google build? Todd Strader 12/21/2019 03:36 PM
1618 Verilator Closed Normal Travis Mail not going to authors? Todd Strader 12/07/2019 04:35 PM
1580 Verilator Closed Low test_regress/t_prot_lib is unstable Todd Strader 11/05/2019 01:51 PM
1487 Verilator Closed Normal New WIDTH warnings on genvars Todd Strader 08/29/2019 11:15 PM
1607 Verilator Closed Normal CI: Add gtkwave include diff to extended tests Wilson Snyder 11/19/2019 03:11 AM
1544 Verilator Closed Low Improve readme Wilson Snyder 11/08/2019 03:34 AM
1248 Verilator Closed Normal Large structures expose GCC/clang compile time bug Wilson Snyder 01/02/2018 11:14 PM
1174 Verilator Closed Normal Shift gives VL_SHIFTR_IIW not declared Wilson Snyder 06/22/2017 10:37 PM
582 Verilog-Perl Closed Normal rt81501: Test failures due to hash randomisation in perl 5.17.6 Wilson Snyder 11/28/2012 01:47 PM
459 Verilog-Perl Closed Normal Comment starting line number wrong Wilson Snyder 05/04/2012 09:51 PM
382 Verilog-mode Closed Normal Support UVM Wilson Snyder 09/07/2011 04:34 PM
376 Verilator Closed Normal Support "parameter type" Wilson Snyder 05/19/2016 01:17 AM
282 Verilog-Perl Closed Normal Escaped identifiers that are keywords are unescaped Wilson Snyder 09/20/2010 07:32 PM
270 Verilog-mode Closed Normal AUTOINST and SystemVerilog interfaces Wilson Snyder 08/18/2010 02:19 PM
255 SystemPerl Closed Normal rt57469: Parallel build fails Wilson Snyder 05/24/2010 02:04 PM
222 Verilog-Perl Closed Normal An example in Verilog::EditFiles doesn't work Wilson Snyder 03/29/2010 06:54 PM
200 Verilog-Perl Closed Normal Support modports in interfaces Wilson Snyder 01/21/2010 09:23 PM
191 Verilog-Perl Closed Normal Define with formal matching $pli call gets misexpanded Wilson Snyder 11/24/2009 02:58 PM
181 Verilator Closed Normal Support struct and union Wilson Snyder 07/31/2012 10:53 PM
174 Verilator Closed Normal Add support for typedef Wilson Snyder 02/07/2010 12:41 PM
(26-50/73) Per page: 25, 100

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