General

Profile

[logo] 
 
Home
About/Contact
Major Tools
  Dinotrace
  Verilator
  Verilog-mode
  Verilog-Perl
Other Tools
  IPC::Locker
  Parallel::Forker
  Voneline
General Info
  Papers

Issues

If you wish to add a new issue, you must log in and create an account; "New Issue" will then appear in the menu bar. Sorry, but this was necessary to prevent form-filling spam.
Filters

Apply Clear

# Project Status Priority Subject Assignee Updated
1657 Verilator New Normal Investigate google build? Todd Strader 12/21/2019 03:36 PM
377 Verilator Feature Normal Support classes and methods 02/06/2016 11:16 PM
378 Verilator Feature Normal Support properties and assertions 03/02/2012 11:42 PM
379 Verilator Feature Normal Support dynamic memory new and delete 03/02/2012 11:42 PM
1537 Verilator Feature Low Support FST structure tracing w/GTKwave 10/06/2019 12:31 PM
1538 Verilator Feature Normal Support full UVM parsing and XML dump 10/06/2019 01:26 PM
1539 Verilator Feature Normal Improve internals of inliner 10/06/2019 12:54 PM
1540 Verilator Feature Normal Improve internal elaboration algorithm 10/06/2019 01:00 PM
1541 Verilator Feature Normal Support unpacked structs 10/06/2019 01:24 PM
1542 Verilator Feature Normal Improve performance of bit operations by vectorizing 10/06/2019 01:24 PM
1543 Verilator Feature Normal Improve performance of icache 10/06/2019 01:23 PM
1567 Verilator Feature Normal Cocotb Integration 12/22/2019 08:02 PM
1637 Verilator Feature Low Support $displayb/o/h, $writeb/o/h (starter project) 12/15/2019 01:38 AM
1638 Verilator Feature Low Support $ferror/$fflush (starter task) 12/15/2019 01:40 AM
1639 Verilator Feature Low Support $countbits (starter task) 12/15/2019 01:42 AM
1650 Verilator Feature Normal Implement type_reference (medium starter task) 12/20/2019 01:23 AM
1566 Verilator Confirmed Normal FST dumping is slow 10/17/2019 10:39 PM
1628 Verilator Confirmed Normal Ongoing cleanup of SymbiFlow sv-tests (help wanted) 12/15/2019 10:41 PM
838 Verilog-mode Confirmed Normal randsequence misindented 11/19/2017 01:17 PM
955 Verilog-mode Confirmed Normal End mis-indents with sized replication 03/26/2018 08:48 PM
1606 Verilator Resolved Normal Complete string methods (starter project) 12/15/2019 01:14 PM
112 IPC::Locker Closed Normal t/02_help.t incompatibility with Pod::Usage 1.30 Wilson Snyder 02/08/2009 09:08 AM
113 IPC::Locker Closed Normal pidwatch issue on cygwin-thread-multi-64int Wilson Snyder 02/08/2009 09:09 AM
255 SystemPerl Closed Normal rt57469: Parallel build fails Wilson Snyder 05/24/2010 02:04 PM
1 TestProject Closed Normal Example issue 04/16/2008 11:13 PM
(1-25/73) Per page: 25, 100

Also available in: Atom CSV