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# Project Status Priority Subject Assignee Updated
1351 Verilator WillNotFix Low Support for loading stimulus from VCD file 05/10/2019 12:28 AM
1350 Verilator Closed Low Support for immediate restict Wilson Snyder 10/06/2018 02:14 PM
1008 Verilator Confirmed Normal Incorrect results with partially out-of-bounds part select (re-opened) 11/19/2017 12:54 PM
999 Verilator Closed Normal $signed ignored under generate block Wilson Snyder 12/19/2015 03:33 PM
823 Verilator Closed Normal Incorrect results with partially out-of-bounds part select Wilson Snyder 11/15/2014 01:46 PM
776 Verilator Closed Normal Incorrect results with XNOR/shift expression Wilson Snyder 06/11/2014 12:58 AM
775 Verilator Closed Normal Strange Verilator "Unsupported" Error Wilson Snyder 06/11/2014 12:58 AM
774 Verilator Closed Normal Another Verilotor bug with large shifts Wilson Snyder 06/11/2014 12:58 AM
773 Verilator Closed Normal Small constants can make C compiler assume signing Wilson Snyder 06/11/2014 12:58 AM
772 Verilator Closed Normal Another Verilator Internal Error for shift by undef value Wilson Snyder 06/11/2014 12:57 AM
768 Verilator Closed Normal Verilator bug in sign extending special boolean expression Wilson Snyder 06/11/2014 12:57 AM
766 Verilator Closed Normal Verilator internal fault related to huge shifts Wilson Snyder 06/11/2014 12:57 AM
765 Verilator Closed Normal Segfault in code generated by Verilator Wilson Snyder 06/11/2014 12:57 AM
764 Verilator Closed Normal Bug in evaluating (defined) expression with undef bits Wilson Snyder 05/11/2014 09:11 PM
763 Verilator Closed Normal Yet another Verilator shift bug Wilson Snyder 05/11/2014 09:07 PM
762 Verilator Closed Normal Strange memory effect in pure combinational acyclic circuit Wilson Snyder 05/11/2014 09:07 PM
761 Verilator Closed Normal Verilator uses undeclared helper function for power op > 64 bits Wilson Snyder 06/22/2017 10:38 PM
760 Verilator Closed Normal Verilator Internal Error for shift by undef value Wilson Snyder 05/11/2014 09:11 PM
759 Verilator Closed Normal Verilator bug in signdness of {single} Wilson Snyder 05/11/2014 09:11 PM
756 Verilator Closed Normal Verilator bug with signedness and arithmetic shift Wilson Snyder 05/11/2014 09:11 PM
754 Verilator Closed Normal Verilator bug with shift, expression width and signedness Wilson Snyder 05/01/2014 08:43 AM
737 Verilator Closed Normal Verilator bug in signed/unsigned expression eval Wilson Snyder 05/11/2014 09:09 PM
736 Verilator Closed Normal Verilator extends ~|a and ~(|a) wrong with -Wno-WIDTH Wilson Snyder 05/11/2014 09:09 PM
735 Verilator Closed Normal Strange Verilator behavior with power, signdness and more 05/11/2014 09:08 PM
733 Verilator Closed Normal Verilator bug in extending $signed 04/08/2014 01:34 AM
(1-25/27) Per page: 25, 100

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