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# Project Status Priority Subject Assignee Updated
1664 Verilator New Normal Verilator Generates C++ code which does not compile ... 04/27/2020 01:04 PM
1663 Verilator New Normal Verilator Generates C++ code which does not compile ... 04/27/2020 07:31 AM
1650 Verilator Feature Normal Implement type_reference (medium starter task) 12/20/2019 01:23 AM
1649 Verilator Feature Low Lint filter specific warnings or wildcards/regexp 12/22/2019 07:51 PM
1644 Verilator Confirmed Normal Performance delta between 4.020 and 4.022 12/22/2019 07:53 PM
1641 Verilator Resolved Normal Statement queue pop_front error after foreach 12/17/2019 11:10 AM
1639 Verilator Feature Low Support $countbits (starter task) 12/15/2019 01:42 AM
1638 Verilator Feature Low Support $ferror/$fflush (starter task) 12/15/2019 01:40 AM
1637 Verilator Feature Low Support $displayb/o/h, $writeb/o/h (starter project) 12/15/2019 01:38 AM
1634 Verilator Resolved Normal `uselib error with Verilator 12/13/2019 01:54 AM
1628 Verilator Confirmed Normal Ongoing cleanup of SymbiFlow sv-tests (help wanted) 12/15/2019 10:41 PM
1627 Verilator Confirmed Normal Warnings and support of array concatenation 12/22/2019 07:56 PM
1626 Verilator Confirmed Normal Interface parameter circular assignment succeeds where it should not 12/22/2019 07:57 PM
1624 Verilator Confirmed Low Bad parameter width error message references parameter definition instead of reference 12/22/2019 07:57 PM
1623 Verilator Confirmed Low Interface declared in parent scope can be used incorrectly 12/22/2019 07:58 PM
1622 Verilator Confirmed Low Wrong modport directionality accross scopes doesn't trigger an error 12/22/2019 07:58 PM
1613 Verilator Confirmed Normal verilator %Warning-WIDTH false positive 12/22/2019 07:59 PM
1610 Verilog-Perl Resolved Normal Getopt thinks a path is a comment 11/21/2019 02:16 AM
1606 Verilator Resolved Normal Complete string methods (starter project) 12/15/2019 01:14 PM
1601 Verilator Confirmed Normal Add SystemC to Travis 12/22/2019 08:00 PM
1593 Verilator Confirmed Normal Parameter-resolved constants from interface components 12/22/2019 08:01 PM
1572 Verilator Feature Normal Extend --protect-lib for foreign/embedded module use 12/22/2019 08:02 PM
1567 Verilator Feature Normal Cocotb Integration 12/22/2019 08:02 PM
1566 Verilator Confirmed Normal FST dumping is slow 10/17/2019 10:39 PM
1545 Verilator Confirmed Normal Warning-CASEOVERLAP is not triggering for signals wider than 12 12/22/2019 08:03 PM
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