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Verilator: Verilator 4.002 Released

Added by Wilson Snyder 8 days ago

Verilator 4.002 2018-09-16

This is a major release. Any patches may require major rework to apply. [Thanks everyone]

  • Add multithreaded model generation.
  • Add runtime arguments.
  • Add GTKWave LXT2 native tracing, bug1333. [Yu Sheng Lin]
  • Note $random has new algorithm; results may vary vs. previous versions.
  • Better optimize large always block splitting, bug1244. [John Coiner]
  • Add new reloop optimization for repetitive assignment compression.
  • Support string.atoi and similar methods, bug1289. [Joel Holdsworth]
  • Fix internals to be C++ null-pointer-check clean.
  • Fix internals to avoid 'using namespace std'.
  • Fix Verilation performance issues, bug1316. [John Coiner]
  • Fix clocker attributes to not propagate on concats. [John Coiner]
  • Fix first clock edge and --x-initial-edge, bug1327. [Rupert Swarbrick]
  • Fix compile error on tracing of string arrays, bug1338. [Iztok Jeras]
  • Fix number parsing with newline after radix, bug1340. [George Cuan]
  • Fix string ?: conditional type resolution, bug1345. [Iztok Jeras]
  • Fix duplicate symbol error on generate tri, bug1347. [Tomas Dzetkulic]

Verilator: Verilator 4.000 approaches; announcement at OrCONF

Added by Wilson Snyder about 1 month ago

We're glad to announce that Verilator 4.000 is now in beta test and will be formally announced at OrConf 2018

The git tree now contains the beta, please give it a try, and enjoy the main new feature of multithreaded simulation!

  • If your git repo was using the 'master' branch (the default) as upstream you need do nothing, you'll now get the 4.000 sources.
  • If you were using the git 'develop-v4' branch, that branch is now merged into 'master'. 'develop-v4' was deleted. Pulling from a branch that has 'develop-v4' as upstream may give a "Your branch is based on 'origin/develop-v4', but the upstream is gone" or "Your configuration specifies to merge with the ref 'refs/heads/develop-v4' from the remote, but no such ref was fetched" error. You need to do this:

    git branch --set-upstream-to=origin/master

  • A new 'v3/devel' branch was made pointing to the previous origin/master (with Version and will only be developed further if another release is required due to a serious issue.

Verilator: Verilator 3.926 Released

Added by Wilson Snyder about 1 month ago

Verilator 3.926 2018-08-22

  • Add OBJCACHE envvar support to examples and generated Makefiles.
  • Change MODDUP errors to warnings, msg2588. [Marshal Qiao]
  • Fix define argument stringification (`"), broke since 3.914. [Joe DErrico]
  • Fix to ignore Unicode UTF-8 BOM sequences, msg2576. [HyungKi Jeong]
  • Fix function inlining inside certain while loops, bug1330. [Julien Margetts]

Verilator: Verilator 3.924 Released

Added by Wilson Snyder 3 months ago

Verilator 3.924 2018-06-12

  • Renamed --profile-cfuncs to --prof-cfuncs.
  • Report interface ports connected to wrong interface, bug1294. [Todd Strader]
  • When tracing, use scalars on single bit arrays to appease vcddiff.
  • Fix parsing "output signed" in V2K port list, msg2540. [James Jung]
  • Fix parsing error on bad missing #, bug1308. [Dan Kirkham]
  • Fix $clog2 to be in verilog 2005, bug1319. [James Hutchinson]

Verilator: Verilator 3.922 Released

Added by Wilson Snyder 6 months ago

Verilator 3.922 2018-03-17

  • Support IEEE 1800-2017 as default language.
  • Support trig functions ($sin() etc), bug1281. [Patrick Stewart]
  • Support calling system functions as tasks, bug1285. [Joel Holdsworth]
  • Support assert properties, bug785, bug1290. [John Coiner, et al]
  • Support $writememh. [John Coiner]
  • Add --no-debug-leak to reduce memory use under debug. [John Coiner]
  • Fix severe runtime performance bug in certain foreach loops. [John Coiner]
  • On convergence errors, show activity. [John Coiner]
  • Fix GCC 8.0 issues, bug1273.
  • Fix pullup/pulldowns on bit selects, bug1274. [Rob Stoddard]
  • Fix verilator_coverage --annotate-min, bug1284. [Tymoteusz Blazejczyk]
  • Fix quoting of quoted arguments. [John Coiner]

Verilog-Perl: Verilog-Perl 3.450 Released

Added by Wilson Snyder 7 months ago

Verilog::Language 3.450 2018-03-12

  • Support SystemVerilog 1800-2017.
  • Moving forward, use the git "stable" branch to track the latest release and git "v#.###" tags for specific releases.

Verilator: Verilator 3.920 released

Added by Wilson Snyder 8 months ago

Verilator 3.920 2018-02-01

  • Moving forward, use the git "stable" branch to track the latest release, and git "v#.###" tags for specific releases.
  • Support 'assume' similar to 'assert', bug1269. [Dan Gisselquist]
  • Fix tracing example file output, bug1268. [Enzo Chi]
  • Fix gate optimization out of memory, add --gate-stmts, bug1260. [Alex Solomatnikov]
  • Fix compile error on public real parameters by suppressing, bug1261. [Alex Solomatnikov]
  • Fix input-only tristate comparisons, bug1267. [Alexis G]
  • Fix missing edge type in xml output, msg2480. [Alexis G]
  • Fix compile error with --public and interface bind, bug1264. [Alexis G]
  • Remove c++filt, bug1265. [Stefan Wallentowitz]

Verilator: Verilator 3.918 Released

Added by Wilson Snyder 9 months ago

Verilator 3.918 2018-01-02

  • Workaround GCC/clang bug with huge compile times, bug1248.
  • Support DPI open arrays, bug909, bug1245. [David Pierce, Victor Besyakov]
  • Add INFINITELOOP warning, bug1254. [Alex Solomatnikov]
  • Support > 64 bit decimal $display.
  • Support DPI time and svLogicVal. [Victor Besyakov] Note older version incorrectly assumed svBitVal even for logicals.
  • Support string len() method. [Victor Besyakov]
  • Add error if always_comb has sensitivity list. [Arjen Roodselaar]
  • Fix SystemC 2.3.2 compile error, bug1251. [Tymoteusz Blazejczyk]
  • Fix modport outputs being treated as inputs, bug1246. [Jeff Bush]
  • Fix false ALWCOMBORDER on interface references, bug1247. [Josh Redford]
  • Fix constant propagation across DPI imports of inout strings. [Victor Besyakov]
  • Fix resolving inline nested interface names, bug1250. [Arjen Roodselaar]

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