Project

General

Profile

[logo] 
 
Home
News
Activity
About/Contact
Major Tools
  Dinotrace
  Verilator
  Verilog-mode
  Verilog-Perl
Other Tools
  IPC::Locker
  Parallel::Forker
  Voneline
General Info
  Papers

Verilog-Perl 3.025 Released

Added by Wilson Snyder almost 12 years ago

Verilog::Language 3.025 2008/05/07

  • Fix "output reg name=expr;" bug34649 syntax error. [Martin Scharrer]
  • Fix functions with "input integer". [Johan Wouters]
  • Fix bug introduced in 3.024 with parametrized defines.
  • Fix compiler warnings under GCC 4.2.1.
  • Fix "endclass" keyword misspelling. [John Dickol]
  • Fix preprocessor `else after series of `elsif. [Mark Nodine]
  • Fix parametrized defines calling define with comma. [Joshua Wise]

Comments