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Verilator 4.008 Released

Added by Wilson Snyder 18 days ago

  • Verilator 4.008 2018-12-01
  • Support "ref" and "const ref" pins and functions, bug1360. [Jake Longo]
  • In --xml-only show the original unmodified names, and add module_files and cells similar to Verilog-Perl, msg2719. [Kanad Kanhere]
  • Add CONTASSREG error on continuous assignments to regs, bug1369. [Peter Gerst]
  • Add PROCASSWIRE error on behavioral assignments to wires, msg2737. [Neil Turton]
  • Add IMPORTSTAR warning on import::* inside $unit scope.
  • Fix --trace-lxt2 compile error on MinGW, msg2711. [HyungKi Jeong]
  • Fix hang on bad pattern keys, bug1364. [Matt Myers]
  • Fix crash due to cygwin bug in getline, bug1349. [Affe Mao]
  • Fix __Slow files getting compiled with OPT_FAST, bug1370. [Thomas Watts]

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