Veripool

Verilator 3.924 2018-06-12

• Renamed --profile-cfuncs to --prof-cfuncs.

• Report interface ports connected to wrong interface, bug1294. [Todd Strader]

• When tracing, use scalars on single bit arrays to appease vcddiff.

• Fix parsing "output signed" in V2K port list, msg2540. [James Jung]

• Fix parsing error on bad missing #, bug1308. [Dan Kirkham]

• Fix $clog2 to be in verilog 2005, bug1319. [James Hutchinson]

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Verilog::Language 3.452 2018-04-12

• Fix parsing "output signed" in V2K port list, msg2540. [James Jung]

• Fix GLIBC assertion failure, bug1299. [Filipe Rosset]

Verilator 3.922 2018-03-17

• Support IEEE 1800-2017 as default language.

• Support trig functions ($sin() etc), bug1281. [Patrick Stewart]

• Support calling system functions as tasks, bug1285. [Joel Holdsworth]

• Support assert properties, bug785, bug1290. [John Coiner, et al]

• Support $writememh. [John Coiner]

• Add --no-debug-leak to reduce memory use under debug. [John Coiner]

• Fix severe runtime performance bug in certain foreach loops. [John Coiner]

• On convergence errors, show activity. [John Coiner]

• Fix GCC 8.0 issues, bug1273.

• Fix pullup/pulldowns on bit selects, bug1274. [Rob Stoddard]

• Fix verilator_coverage --annotate-min, bug1284. [Tymoteusz Blazejczyk]

• Fix quoting of quoted arguments. [John Coiner]

Verilog::Language 3.450 2018-03-12

• Support SystemVerilog 1800-2017.

• Moving forward, use the git "stable" branch to track the latest release and git "v#.###" tags for specific releases.

Verilator 3.920 2018-02-01

• Moving forward, use the git "stable" branch to track the latest release, and git "v#.###" tags for specific releases.

• Support 'assume' similar to 'assert', bug1269. [Dan Gisselquist]

• Fix tracing example file output, bug1268. [Enzo Chi]

• Fix gate optimization out of memory, add --gate-stmts, bug1260. [Alex Solomatnikov]

• Fix compile error on public real parameters by suppressing, bug1261. [Alex Solomatnikov]

• Fix input-only tristate comparisons, bug1267. [Alexis G]

• Fix missing edge type in xml output, msg2480. [Alexis G]

• Fix compile error with --public and interface bind, bug1264. [Alexis G]

• Remove c++filt, bug1265. [Stefan Wallentowitz]

Verilator 3.918 2018-01-02

• Workaround GCC/clang bug with huge compile times, bug1248.

• Support DPI open arrays, bug909, bug1245. [David Pierce, Victor Besyakov]

• Add INFINITELOOP warning, bug1254. [Alex Solomatnikov]

• Support > 64 bit decimal $display.

• Support DPI time and svLogicVal. [Victor Besyakov] Note older version incorrectly assumed svBitVal even for logicals.

• Support string len() method. [Victor Besyakov]

• Add error if always_comb has sensitivity list. [Arjen Roodselaar]

• Fix SystemC 2.3.2 compile error, bug1251. [Tymoteusz Blazejczyk]

• Fix modport outputs being treated as inputs, bug1246. [Jeff Bush]

• Fix false ALWCOMBORDER on interface references, bug1247. [Josh Redford]

• Fix constant propagation across DPI imports of inout strings. [Victor Besyakov]

• Fix resolving inline nested interface names, bug1250. [Arjen Roodselaar]

Verilog::Language 3.448 2018-01-02

• Workaround comment bug in flex 2.6.4, bug1252. [Rob Stoddard]

Verilator 3.916 2017-11-25

• Support self-recursive modules, bug659. [Sean Moore, et al]

• Support $error/$warning in elaboration time blocks.

• Support $size/$bits/etc on type references.

• Add error when driving input-only modport, bug1110. [Trevor Elbourne]

• Add BSSPACE and COLONPLUS lint warnings.

• Detect MSB overflow when under VL_DEBUG, bug1238. [Junyi Xi]

• Add data types to --xml. [Rui Terra]

• Fix partial slicing with pattern assignments, bug991. [Johan Bjork]

• Fix false unused warning on interfaces, bug1241. [Laurens van Dam]

• Fix error on "unique case" with no cases.

• Fix MacOS portability, bug1232. [Jeff Bush]

Verilog::Language 3.446 2017-11-08

• Fix `` expansion of `defines, bug1225, bug1227, bug1228. [Odd Magne Reitan]