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Activity

From 03/01/2011 to 03/30/2011

03/30/2011

11:22 AM Issue #337 (Assigned): Compile Issue with Large Design with Large I/O Buswidth
For DPI, it should be something simple to fix. What specific error did you get? You indicated you're calling DPI fr... Wilson Snyder
03:22 AM Issue #337 (NotEnoughInfo): Compile Issue with Large Design with Large I/O Buswidth
This is a follow up to the issue with Fdisplay but the issue was not with Fdisplay so I created a new item. I have a ... Andy Wagner

03/18/2011

02:27 AM Issue #335: type casting does not work
BTW only simple scalar types are supported, no arrays etc. I suspect there will be later improvements needed here.
Wilson Snyder
02:27 AM Issue #335 (Resolved): type casting does not work
Fixed in git for 3.812.
Wilson Snyder

03/16/2011

10:08 PM Issue #335 (Closed): type casting does not work
Example:
`define MC_WIDTH 32
typedef logic [`MC_WIDTH-1:0] mc_t;
module t( output mc_t o,
inp...
Alex Solomatnikov

03/12/2011

12:47 PM Issue #333 (Resolved): Loops not unrolling due to width mismatches?
Thanks for the good test.
This wasn't really intentionally unsupported, but as you surmised a side
effect of widt...
Wilson Snyder

03/10/2011

09:03 PM Issue #333 (Closed): Loops not unrolling due to width mismatches?
This might be intended behavior. I would have expected width mismatch warnings but was confused by the BLKLOOPINIT w... Joe Eiler

03/08/2011

01:46 AM Issue #329 (Resolved): seg. fault on incorrect Verilog
That's a fun one! Fixed in git for 3.812+.
Wilson Snyder

03/07/2011

06:57 PM Issue #329 (Closed): seg. fault on incorrect Verilog
The following erroneous code causes seg. fault:
module site_rbuf #(parameter WIDTH=WIDTH, parameter DEPTH=`NUM_REQ...
Alex Solomatnikov
 

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