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Activity

From 11/28/2017 to 12/27/2017

12/27/2017

02:35 AM Issue #1254 (Resolved): verilator generates infinite loop
Reasonable enough, added to git towards 3.917.
Wilson Snyder

12/22/2017

05:27 AM Issue #1254 (Closed): verilator generates infinite loop
Verilog:... Alex Solomatnikov

12/17/2017

11:01 PM Issue #1121 (NotEnoughInfo): Simulation errors with clock bus
Closing due to age, please file a new issue if you are still having problems.
Wilson Snyder
09:33 PM Issue #1245 (Resolved): dpi open array support (LRM 35.5.6.1 Open arrays)
Open arrays supported in git towards 3.917.
Based on a survey of other simulators, Verilator matches what they do ...
Wilson Snyder
09:29 PM Issue #909 (Resolved): integer arrays as DPI-C function call arguments
Open arrays supported in git towards 3.917.
Wilson Snyder
01:23 PM Issue #1251 (Resolved): Compilation error for SystemC 2.3.2
Excellent, thanks for providing a patch for fixing this, it is appreciated, and perfectly done.
Fixed in git towar...
Wilson Snyder
09:06 AM Issue #1251 (Closed): Compilation error for SystemC 2.3.2
Hi,
Accellera has updated SystemC to version 2.3.2.
In sysc/tracing/sc_trace.h there are two new pure virtual met...
Tymoteusz Blazejczyk

12/14/2017

12:56 AM Issue #1245: dpi open array support (LRM 35.5.6.1 Open arrays)
Making progress, but not there yet.
Note this is a superset of bug909.
Wilson Snyder
12:52 AM Issue #1249 (AskedReporter): Struct initialisation with data type and member name is not supporte...
Wilson Snyder
12:52 AM Issue #1250 (Resolved): Nested interface reference not found due to inline optimization
This was a bug in the inliner, thanks for the example.
Fixed in git towards 3.917.
>always_comb @(*) begin
T...
Wilson Snyder

12/13/2017

06:22 AM Issue #1250 (Closed): Nested interface reference not found due to inline optimization
When a parent module instantiates an interface (or passes an interface from its parent) to a child module, nested int... Arjen Roodselaar

12/09/2017

05:03 PM Issue #1248 (Resolved): Large structures expose GCC/clang compile time bug
Workaround added to Verilator in git towards 3.917.
Wilson Snyder
05:03 PM Issue #1248: Large structures expose GCC/clang compile time bug
Matching problem in clang/LLVM:
https://bugs.llvm.org/show_bug.cgi?id=35585
Wilson Snyder

12/08/2017

01:05 AM Issue #1249: Struct initialisation with data type and member name is not supported in 3.916
This is (mostly?) supported, please modify the test_regress/t/t_struct_init.v to show the issue, and pass on another ... Wilson Snyder

12/07/2017

09:48 AM Issue #1249 (NotEnoughInfo): Struct initialisation with data type and member name is not supporte...
I think verilator doesn't support the struct initialisation as below in release 3.916. Do you have plan to support it... Enzo Chi
02:29 AM Issue #1247 (Resolved): ALWCOMBORDER Warnings when driving interfaces
Thanks for the good test.
Fixed in git towards 3.917.
Wilson Snyder
02:26 AM Issue #1248 (Closed): Large structures expose GCC/clang compile time bug
Very large models cause Verilator to generate classes with a large number of member variables. When these are compile... Wilson Snyder

12/06/2017

12:58 PM Issue #1247 (Closed): ALWCOMBORDER Warnings when driving interfaces
I am receiving ALWCOMBORDER warnings when I drive an interface signal with another interface signal, inside an always... Josh Redford
04:39 AM Issue #1245: dpi open array support (LRM 35.5.6.1 Open arrays)
Hi Wilson. I am just updated Shunt depository.
Verilator-Shunt example path is: https://github.com/xver/Shunt/tree/...
victor besyakov

11/29/2017

12:14 AM Issue #1246 (Resolved): modport declaration incorrectly treats some outputs as inputs
Simple enough fix, thanks for a complete test case.
Fixed in git towards 3.917.
Wilson Snyder

11/28/2017

05:23 AM Issue #1246 (Closed): modport declaration incorrectly treats some outputs as inputs
If you have define multiple outputs in a list within a modport, the first is treated as an output, but subsequent ite... Jeff Bush
 

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