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Activity

From 07/28/2018 to 08/26/2018

08/26/2018

11:55 PM Issue #1332: Verilator 4.00 multi-threading on OS X
Try, try again please. Wilson Snyder
06:48 PM Issue #1332: Verilator 4.00 multi-threading on OS X
The random number problem is solved. You forgot to add the macro and the include which is needed on OS X:... Florian Zaruba
11:07 AM Issue #1332: Verilator 4.00 multi-threading on OS X
In git, I updated the random code to use its own algorithm, please try it.
Wilson Snyder
04:26 PM Issue #1333 (Closed): Support LXT2 file format natively
I make a issue about "this development thread":https://www.veripool.org/boards/3/topics/2601-Verilator-A-way-to-suppo... Yu Sheng Lin

08/25/2018

09:54 PM Issue #1332: Verilator 4.00 multi-threading on OS X
Great, thanks, please check the git change I committed for sched_getcpu is good.
I don't understand your proposed ...
Wilson Snyder
07:45 PM Issue #1332: Verilator 4.00 multi-threading on OS X
Thanks for getting back to me. Yes that seems to fix the problem of sched_getcpu:... Florian Zaruba
06:10 PM Issue #1332 (Confirmed): Verilator 4.00 multi-threading on OS X
Thanks for trying this out!
I'd really like OSX to work out of the box, so made this high priority.
I don't hav...
Wilson Snyder
05:55 PM Issue #1332 (Closed): Verilator 4.00 multi-threading on OS X
Thanks for your awesome work on Verilator and related tools.
I just wanted to let you know I am running into issue...
Florian Zaruba
05:50 PM Issue #1289 (Resolved): scr1 test suite: string.hextoa is not implemented
Fixed in git towards 4.000. Added itoa, octtoa, hextoa, bintoa, realtoa.
Wilson Snyder
02:45 PM Issue #1222 (NotEnoughInfo): Verilator behaviour of driving DUT inputs
Closing due to age; tracing issues etc fixed earlier.
Wilson Snyder
02:44 PM Issue #1221 (NotEnoughInfo): Verilator is unfriendly to cross compiling verilated output. Simpl...
Seems like this got stalled so closing due to age, if you end up with a general patch for cross compiling please reop... Wilson Snyder
02:41 PM Issue #1249 (NotEnoughInfo): Struct initialisation with data type and member name is not supporte...
Closing as no test case, feel free to post one and reopen.
Wilson Snyder
02:40 PM Issue #1276 (NotEnoughInfo): vcd trace splits packed data type when it comes through a typedef
Closing as no test case, feel free to post one and reopen.
Wilson Snyder
02:40 PM Issue #1318 (Closed): Incorrect paths when compiling from Git
Documentation updated earlier, if you have additional suggestions please feel free to suggest more comments.
Wilson Snyder
02:38 PM Issue #1315 (Feature): Using an array in a function called from a parameter
Wilson Snyder
02:37 PM Issue #1315 (Confirmed): Using an array in a function called from a parameter
Unpacked arrays (the parameter) are not currently supported in constant functions.
Added a test_regress/t/t_param_...
Wilson Snyder
02:38 PM Issue #1307 (NotEnoughInfo): Can not dump trace with CMAKE compiled SystemC library
Closing due to age, if you have more information feel free to reopen.
Wilson Snyder
02:25 PM Issue #1327 (AskedReporter): Strange initialisation behaviour with "VinpClk" cloned clock variables
Wilson Snyder
12:10 PM Verilator 4.000 approaches; announcement at OrCONF
We're glad to announce that Verilator 4.000 is now in beta test and will be formally announced at "OrConf 2018":https... Wilson Snyder

08/23/2018

08:40 AM Issue #1331 (Closed): documentation SystemC example
Ah. The online manual was intended to be an exact duplicate of verilator --help, but due to a bug it wasn't getting u... Wilson Snyder
07:26 AM Issue #1331: documentation SystemC example
I meant this online document:
https://www.veripool.org/projects/verilator/wiki/Manual-verilator#EXAMPLE-SYSTEMC-EXEC...
Iztok Jeras

08/22/2018

10:48 PM Issue #1330 (Closed): Broken link error when inlining functions under while loops
In 3.926. Wilson Snyder
10:48 PM Verilator 3.926 Released
Verilator 3.926 2018-08-22
**** Add OBJCACHE envvar support to examples and generated Makefiles.
**** Change ...
Wilson Snyder
09:29 PM Issue #1331 (AskedReporter): documentation SystemC example
I assume you're referring to the verilator --help example. I believe the example works ok as it worked just now for m... Wilson Snyder
07:53 PM Issue #1331 (Closed): documentation SystemC example
I would like to start learning SystemC...
The license for systemc is now open source compatible, so it can be provid...
Iztok Jeras

08/21/2018

10:28 PM Issue #1328 (AskedReporter): Parameter with type string cause compile error when passed to $readm...
Are you sure you're using the latest version, I can't recreate this and suspect it may have been fixed in 3.922.
Wilson Snyder
10:09 PM Issue #1330 (Resolved): Broken link error when inlining functions under while loops
Thanks for the good test case, this was related to certain function calls under while loops.
Fixed in git towards ...
Wilson Snyder

08/19/2018

06:31 AM Issue #1329 (AskedReporter): Compile error "expected unqualified-id before numeric constant"
Sorry you are having problems.
What OS version?
What flex version?
What is the code around the lines the com...
Wilson Snyder

08/16/2018

10:17 AM Issue #1330 (Closed): Broken link error when inlining functions under while loops
This internal error occurs when verilating the attached test case, but only when the --trace switch is specified
v...
Julien Margetts

08/14/2018

08:12 PM Issue #1329 (NoFixNeeded): Compile error "expected unqualified-id before numeric constant"
./configure runs without issue, but make fails with the below message. I have tried newer versions of flex/bison, bu... Shawn Boshart

08/12/2018

10:24 AM Issue #1328 (Confirmed): Parameter with type string cause compile error when passed to $readmemh(...
I suspect it is legal to use a string instead of Verilog bitvector-as-string.
Could you attempt a patch, and also...
Wilson Snyder

08/11/2018

09:31 PM Issue #1328 (NoFixNeeded): Parameter with type string cause compile error when passed to $readmem...
With my limited understanding of the SV type system I expect the following to work:... Arjen Roodselaar
03:42 PM Issue #1326 (AskedReporter): Comb Logic order problem
Verilator internally should treat assigns identically to always_comb, so probably something more complicated is going... Wilson Snyder
03:37 PM Issue #1327: Strange initialisation behaviour with "VinpClk" cloned clock variables
I suspect the code should be changed to at init time after rand reset, set all last vars = the normal non-last value.... Wilson Snyder

08/09/2018

01:32 PM Issue #1327 (Closed): Strange initialisation behaviour with "VinpClk" cloned clock variables
We're seeing a strange behaviour in our system testbench. I've tracked
it down to a problem with (seemingly) spuriou...
Rupert Swarbrick

08/06/2018

05:25 AM Issue #1326: Comb Logic order problem
... Kyunghwan Cho
05:18 AM Issue #1326 (NotEnoughInfo): Comb Logic order problem

When trying to compile systemverilog source, I found the following issues.
alu0_opd_update reflects the previous...
Kyunghwan Cho
 

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