Verilator

01/05/2019

11:32 AM Issue #1386 (Confirmed): Reading free memory after unrolling a gen loop

This is caused by the B[0] reference, but that's supported the code valgrind sees is actually looking for interfaces ... Wilson Snyder

10:51 AM Issue #1387 (Confirmed): Internal error when task is used to assign subscripted vector

The problem is internal code isn't treating the task reference as a statement; working on a fix as touches a lot of c... Wilson Snyder

09:58 AM Issue #1385 (Resolved): Uninitialized data written to dependency file, if executable is found fro...

Uninit problem fixed in git towards 4.010.
I tried a patch using the exe name, but this causes a problem in that g... Wilson Snyder

01/04/2019

05:57 PM Issue #1387 (Closed): Internal error when task is used to assign subscripted vector

... Al Grant

01:50 PM Issue #1386 (Closed): Reading free memory after unrolling a gen loop

... Al Grant

11:12 AM Issue #1385: Uninitialized data written to dependency file, if executable is found from PATH

Also the same thing happens if you bypass the Perl script and use... Al Grant

11:06 AM Issue #1385 (Closed): Uninitialized data written to dependency file, if executable is found from ...

The Perl script (i.e. "verilator") tries various ways to find the executable ("verilator_bin") one of which is to fal... Al Grant

12:03 AM Issue #1380 (Resolved): Large numbers silently truncated

Fixed in git towards 4.010
Wilson Snyder

01/03/2019

11:24 PM Issue #1384 (AskedReporter): File-extension language option not consistently applied

I don't see anything immediately obviously wrong, but certainly wouldn't surprise me if there are issues.
Could yo... Wilson Snyder

03:33 PM Issue #1384 (Closed): File-extension language option not consistently applied

Suppose you have a Verilog (not SystemVerilog) file testdo1.v:... Al Grant

09:40 AM Issue #1382: Inconsistent LITENDIAN warnings on arrays

Well the 64-bit cutoff was just an idea, to achieve the same effect as the current packed/unpacked heuristic but in a... Al Grant

01/02/2019

11:40 PM Issue #1381 (Resolved): "Duplicate declaration of cell" diagnostic with missing location

No reason for an error at all in this case, as code is legal.
Fixed in git towards 4.010.
Wilson Snyder

11:16 PM Issue #1383 (Feature): Support SystemVerilog void casts & warn if not present

Wilson Snyder

11:16 PM Issue #1383: Support SystemVerilog void casts & warn if not present

Should be straight foward enough, perhaps you could provide some test_regress style test cases and a patch to impleme... Wilson Snyder

11:15 PM Issue #1382 (AskedReporter): Inconsistent LITENDIAN warnings on arrays

The warning is intended to find common Verilog bugs, not warn of constructs that may have confusing mappings to C++. ... Wilson Snyder

12:16 PM Issue #1372: XML output insufficiently qualified

Thanks again, pushed. Wilson Snyder

12/31/2018

06:12 PM Issue #1383 (Closed): Support SystemVerilog void casts & warn if not present

SystemVerilog supports casts; one use is to explicitly void a non-void function call, to avoid a lint warning:... Al Grant

04:52 PM Issue #1382 (AskedReporter): Inconsistent LITENDIAN warnings on arrays

This is something that has come up before in #614 and #1202 but still doesn't seem quite right as of 4.008. In this c... Al Grant

02:30 PM Issue #1381 (Closed): "Duplicate declaration of cell" diagnostic with missing location

Compiling a source file with declarations but no top module:... Al Grant

09:18 AM Issue #1380 (Closed): Large numbers silently truncated

... Jonathan Kimmitt

12/22/2018

02:34 PM Issue #1372: XML output insufficiently qualified

... and have a happy Christmas and prosperous new year if you have already hung up your mouse for the year.
Jonathan Kimmitt

02:32 PM Issue #1372: XML output insufficiently qualified

It turns out the XML output does not include the display type for $display() and $write() statements and similar. As ... Jonathan Kimmitt

12/20/2018

11:53 AM Issue #1238: Verilator concatenation error when passing overflowed value from C++ to verilog inpu...

Yu Sheng, I'm not sure exactly where you're suggesting the comments be put, perhaps you could attach a documentation ... Wilson Snyder

09:25 AM Issue #1238: Verilator concatenation error when passing overflowed value from C++ to verilog inpu...

I also bump into this problem, so I reply to this closed issue.
This problem is somewhat common and hard to identify... Yu Sheng Lin

12/19/2018

01:53 AM Issue #1376 (Resolved): Incorrect array contents in FST and LXT2 output formats

Thanks for the report and pointing out the fix.
Fixed in git towards 4.010.
Wilson Snyder

01:42 AM Issue #1378 (Resolved): SystemVerilog array initialization crashes verilator with no useful error...

Thanks for the good report.
Simple fix, fixed in git towards 4.010.
Wilson Snyder

12/18/2018

02:05 PM Issue #1378 (Closed): SystemVerilog array initialization crashes verilator with no useful error m...

If we have a SV packed structure with several elements and we try to initialize it as an array list, but the array li... Viktor Tomov

12/16/2018

12:26 AM Issue #1377: Segmentation Fault when tracing is enabled

Perhaps you didn't link with -ggdb?
A test case would be appreciated.
Wilson Snyder

12/15/2018

11:22 PM Issue #1377: Segmentation Fault when tracing is enabled

Wilson Snyder wrote:
> >Program received signal SIGSEGV, Segmentation fault. 0x0000000000026816 in ?? ()
>
> You ... Aaron Kelly

01:15 PM Issue #1377: Segmentation Fault when tracing is enabled

>Program received signal SIGSEGV, Segmentation fault. 0x0000000000026816 in ?? ()
You need to compile with debug o... Wilson Snyder

02:36 AM Issue #1377: Segmentation Fault when tracing is enabled

Wilson Snyder wrote:
> Thanks.
>
> There's numerous trace control methods, probably --trace-depth is the first to... Aaron Kelly

12:43 AM Issue #1377 (AskedReporter): Segmentation Fault when tracing is enabled

Thanks.
There's numerous trace control methods, probably --trace-depth is the first to try, see others in the manu... Wilson Snyder

12:24 AM Issue #1377 (NotEnoughInfo): Segmentation Fault when tracing is enabled

Hi all,
First off let me thank you for this amazing software - I have compiled a 250k gate design with some of the... Aaron Kelly

12/13/2018

08:58 PM Issue #1376 (Closed): Incorrect array contents in FST and LXT2 output formats

The bit string created by the VerilatedFst::array2Str() method is incorrect.
The two for() loops should be swapped.
Aleksander Osman

03:19 AM Issue #1372: XML output insufficiently qualified

Applied. No worries, easy as long as you give patches!
Wilson Snyder

12/12/2018

05:11 PM Issue #1372: XML output insufficiently qualified

That resolution didn't last long. It turns out AstVarXRef's are not qualified with the path
of the interface that th... Jonathan Kimmitt

06:18 AM Issue #1328: Parameter with type string cause compile error when passed to $readmemh(...)

Apologies for the radio silence. Life got in the way of hobby and I wasn't able to look at this. Unfortunately this w... Arjen Roodselaar

12/11/2018

08:43 AM Issue #1372: XML output insufficiently qualified

Thanks. I'm hoping that's enough to get up and running. I am considering this patch provisionally closed.
Jonathan Kimmitt

12:12 AM Issue #1372: XML output insufficiently qualified

Patch 6 pushed.
Wilson Snyder

12/10/2018

05:36 PM Issue #1372: XML output insufficiently qualified

interface modportnames are not mentioned in the typetable (which leaves direction of module interface ports ambiguous... Jonathan Kimmitt

12:26 PM Issue #1372: XML output insufficiently qualified

Patch 5 pushed, no worries!
Wilson Snyder

12:07 PM Issue #1372: XML output insufficiently qualified

Dear Wilson,
I realized too late that the patch previously submitted does not cover dumping port directions for mo... Jonathan Kimmitt