Project

General

Profile

[logo] 
 
Home
About/Contact
Major Tools
  Dinotrace
  Verilator
  Verilog-mode
  Verilog-Perl
Other Tools
  IPC::Locker
  Parallel::Forker
  Voneline
General Info
  Papers

Activity

From 08/13/2019 to 09/11/2019

09/11/2019

07:11 PM Issue #1503: [VerilogAMS]: Unknown Language Specified
Thanks for the response. I apologize, since it was mentioned in the options, I thought may be it is supported, althou... Rohit Yadav
11:19 AM Issue #1503 (WillNotFix): [VerilogAMS]: Unknown Language Specified
Verilator supports almost no AMS, basically wreal and one or two functions, and this is unlikely to be improved even ... Wilson Snyder
02:17 PM Issue #1504 (Closed): Produce man files during 'make all'
./nodist/install_test runs cleanly:... Todd Strader
12:59 PM Issue #1504: Produce man files during 'make all'
To test installation run ./nodist/install_test
This isn't part of the regression as builds differently.
If that...
Wilson Snyder
12:01 PM Issue #1504: Produce man files during 'make all'
Yeah, on that note I didn't have latex installed until just now. I tried to 'make dist' but failed to make README.pd... Todd Strader
11:22 AM Issue #1504: Produce man files during 'make all'
I think the original thinking was most people won't want to install tex. They do have to have perl. So I'd suggest .... Wilson Snyder

09/10/2019

12:31 PM Issue #1504: Produce man files during 'make all'
t_dist_manifest is failing now because the .1 files are both in the DISTFILES list and in MANIFEST.SKIP. I was just ... Todd Strader
11:06 AM Issue #1504 (Closed): Produce man files during 'make all'
It appears the intention is to build the man files when building the 'all' target:... Todd Strader
01:55 AM Issue #1503 (WillNotFix): [VerilogAMS]: Unknown Language Specified
Hi,
I am new to Verilator. I am interested in simulating several verilogams test cases with Verilator. I ran the f...
Rohit Yadav

09/06/2019

05:21 PM Issue #1502 (Closed): -LDLIBS isn't an option
(This can go to closed immediately as trivial doc bug.)
Wilson Snyder
05:06 PM Issue #1502 (Resolved): -LDLIBS isn't an option
Done. Todd Strader
05:00 PM Issue #1502 (Assigned): -LDLIBS isn't an option
Huh. Yes, guess de-document it. Feel free to squash & push.
Wilson Snyder
04:58 PM Issue #1502 (Closed): -LDLIBS isn't an option
The --help mentions -LDLIBS but that isn't actually an option. Perhaps there was a thought about plumbing both LDFLA... Todd Strader
11:10 AM Issue #1501 (Confirmed): Support bind statements within generate blocks
Thanks for the test.
This is a bug due to Bind being expanded up front before parameters are resolved.
Note t...
Wilson Snyder
06:28 AM Issue #1501 (Confirmed): Support bind statements within generate blocks
A bind statement within a generate if, if the generate if evaluates to false, should not bind. ... Dan Petrisko

09/04/2019

01:55 PM Issue #1490: Add an option to create a DPI protected library
More for my own notes than anything else: running XSim with a static DPI library is not as simple as I had earlier in... Todd Strader
10:24 AM Issue #1499 (Resolved): Have V3EmitC::emitcSyms honor --output-split-cfuncs
Done. This has been pushed to git now. Todd Strader
01:33 AM Issue #1499 (Assigned): Have V3EmitC::emitcSyms honor --output-split-cfuncs
Good stuff, thanks.
Once you update tests feel free to squash and push.
Wilson Snyder
01:29 AM Issue #1496 (Resolved): Support additional file I/O functions $fseek, $ftell, $frewind
Thanks again.
Pushed to git towards 4.020.
Wilson Snyder

09/03/2019

11:37 PM Issue #1499: Have V3EmitC::emitcSyms honor --output-split-cfuncs
It just dawned on me that I didn't modify t_flag_csplit.pl to verify that it is now producing Syms__#.cpp files (whic... Todd Strader
08:33 PM Issue #1499: Have V3EmitC::emitcSyms honor --output-split-cfuncs
Proposed change:
https://github.com/toddstrader/verilator-dev/tree/sym-split
Todd Strader
05:16 PM Issue #1499 (Closed): Have V3EmitC::emitcSyms honor --output-split-cfuncs
I'm planning to modify V3EmitC::emitcSyms to respect --output-split-cfuncs in order to break up the symbol object con... Todd Strader
12:42 PM Issue #1496: Support additional file I/O functions $fseek, $ftell, $frewind
I agree on the certificate and ack the request explicitly. Howard Su
10:50 AM Issue #1496 (Assigned): Support additional file I/O functions $fseek, $ftell, $frewind
Excellent work, even in updating the tests.
Just one legal thing, in the patch please insert your name in docs/CON...
Wilson Snyder
04:14 AM Issue #1496 (Closed): Support additional file I/O functions $fseek, $ftell, $frewind
Attached the patch to add three functions.
The scenario is that my test bench is able to parsing elf file and load...
Howard Su
12:23 PM Issue #1369: Raise error / warning on continous assignment to reg
Git is the change-by-change repo, which is snapshotted for the tarballs.
Anyhow the version released this weekend ...
Wilson Snyder
12:06 PM Issue #1369: Raise error / warning on continous assignment to reg
Is the git version different from tarball version ?I thought that they were the same.
I'll have to use git version. ...
Kris Jeon
11:55 AM Issue #1369: Raise error / warning on continous assignment to reg
See https://www.veripool.org/projects/verilator/wiki/Installing
Wilson Snyder
11:23 AM Issue #1369: Raise error / warning on continous assignment to reg
Oh, where can I get the unreleased git version ?
Kris Jeon
11:05 AM Issue #1490: Add an option to create a DPI protected library
I'm unaware of how Modelsim handles DPI.
Was thinking the structure would be part of the AST (as everything tries ...
Wilson Snyder
11:00 AM Issue #1490: Add an option to create a DPI protected library
Thanks for all the feedback.
> Wondering why you build a shared object instead of a static library (.a)?
Becaus...
Todd Strader

09/01/2019

03:16 PM Issue #1494 (Resolved): verilator 4.018 build fails at 'make test' in examples/hello_world_c
Ahmed, thanks for the report.
Todd, thanks for pointing out the commit. Yes, part of that removal should have bee...
Wilson Snyder
12:05 PM Issue #1494: verilator 4.018 build fails at 'make test' in examples/hello_world_c
Setting VERILATOR_ROOT to the root of your checkout will fix the problem.
Wilson, something about this changed at ...
Todd Strader
03:18 AM Issue #1494 (Closed): verilator 4.018 build fails at 'make test' in examples/hello_world_c
When building verilator 4.018, the build failed when running make test in
examples/hello_world_c, with the followin...
أحمد المحمودي

08/31/2019

12:12 AM Issue #1490: Add an option to create a DPI protected library
In addition to a test_regress, please add an example/, then refer to it in the bin/verilator docs.
Bunch of TODOs ...
Wilson Snyder

08/30/2019

11:41 AM Issue #1490: Add an option to create a DPI protected library
To be clear, I think the MVP is feature complete (something self-contained that people could try out). There's a lot... Todd Strader
09:59 AM Issue #1490: Add an option to create a DPI protected library
Turns out that option #5 is to not need the DPI header at all. I'm not sure why I thought I needed it, but I don't.
...
Todd Strader

08/29/2019

11:15 PM Issue #1435 (Closed): Report column numbers and source text in error messages
In 4.018.
Wilson Snyder
11:15 PM Issue #1487 (Closed): New WIDTH warnings on genvars
In 4.018.
Wilson Snyder
11:14 PM Issue #1491 (Closed): Add --dpi-hdr-only option
In 4.018.
Wilson Snyder
11:14 PM Issue #1475 (Closed): V3Hashed.cpp Called isIdentical on non-hashed nodes, from Gate dedupe()
In 4.018.
Wilson Snyder
11:14 PM Issue #1442 (Closed): Enum value not made sized when enum sized
In 4.018.
Wilson Snyder
11:14 PM Issue #1429 (Closed): Feature request: elaboration tasks
In 4.018.
Wilson Snyder
11:14 PM Issue #1493 (Closed): Add XSim support to driver.pl
In 4.018.
Wilson Snyder
09:03 PM Issue #1493 (Resolved): Add XSim support to driver.pl
Great, thanks for the info. This is squashed and pushed now. Todd Strader
02:30 PM Issue #1493 (Feature): Add XSim support to driver.pl
These changes seem fine, you can squash and merge them as you feel appropriate.
When debugging a single test I som...
Wilson Snyder
11:40 AM Issue #1493 (Closed): Add XSim support to driver.pl
Related to bug1490:
https://github.com/toddstrader/verilator-dev/tree/xsim
This is particularly useful to me beca...
Todd Strader
11:14 PM Issue #1481 (Closed): Add rr support to the perl wrappers
In 4.018.
Wilson Snyder
11:14 PM Issue #1305 (Closed): Error messages do not contain hierarchical information
In 4.018.
Wilson Snyder
11:13 PM Verilator 4.018 Released
Verilator 4.018 2019-08-29
** When showing an error, show source code and offer suggestions of replacements.
...
Wilson Snyder
10:36 PM Issue #1489 (Feature): Python support for Verilated designs
>the Python compile definition is VL_PYTHON. Is this ok? Because some variables have a VM_ prefix and some VL_.
VM...
Wilson Snyder

08/28/2019

01:14 PM Issue #1483 (Closed): Make verilator_ext_tests head-to-head
Wilson Snyder
12:39 PM Issue #1483 (Resolved): Make verilator_ext_tests head-to-head
Done and done. Todd Strader
11:54 AM Issue #1483: Make verilator_ext_tests head-to-head
Ah, driver error. Feel free to squash and push. If you didn't already please contact the SweRV team to report their ... Wilson Snyder
09:59 AM Issue #1483: Make verilator_ext_tests head-to-head
That's what I've been doing. I just added ci/update_submodules.sh which does the remote submodule update for all sub... Todd Strader
12:34 PM Issue #1369: Raise error / warning on continous assignment to reg
Please use the unreleased git version, it intended to fix this.
Wilson Snyder
12:10 PM Issue #1369: Raise error / warning on continous assignment to reg
Hi,
It's been modified from 4.016. 4.016 version doesn't warn continuous assignments for the port (out) declared a...
Kris Jeon
01:44 AM Issue #1491 (Resolved): Add --dpi-hdr-only option
Pushed since I've used a similar feature in ModelSim for purposes other than what we're discussing in bug1490. Todd Strader
12:07 AM Issue #1490: Add an option to create a DPI protected library
#3 is what I was thinking. Or, ideally refactor the DPI emit code to output something closer to pure Ast, and have V... Wilson Snyder
12:03 AM Issue #1490: Add an option to create a DPI protected library
> Why can't we build the dpi header in the same binary run? This seems cleaner for the user.
It would definitely b...
Todd Strader

08/27/2019

11:07 PM Issue #1490 (Assigned): Add an option to create a DPI protected library
Will post comments about patch once get chance to review them.
>To build the library, I need to run Verilator agai...
Wilson Snyder
11:02 PM Issue #1491 (Assigned): Add --dpi-hdr-only option
I'm fine with your squashing and pushing this.
However in the larger picture (perhaps worth discussing in the othe...
Wilson Snyder
10:59 PM Issue #1483: Make verilator_ext_tests head-to-head
These changes look fine.
Personally I'd like to be able to run the tests pointing at a separate verilator tree (I ...
Wilson Snyder
08:40 PM Issue #1369: Raise error / warning on continous assignment to reg
I wouldn't have thought your patch would be needed as the unreleased git version of verilator should have fixed this ... Wilson Snyder

08/24/2019

12:12 PM Issue #1491: Add --dpi-hdr-only option
I added a test for the new option. I believe this is ready to land now:
https://github.com/toddstrader/verilator-de...
Todd Strader

08/23/2019

10:31 PM Issue #1491: Add --dpi-hdr-only option
It looks like I can just call compile() twice with different flags. I should be able to make something happen when I... Todd Strader
01:16 PM Issue #1491 (Closed): Add --dpi-hdr-only option
Towards bug1490. I have the feature coded, but am not sure about the best way to test this:
https://github.com/todd...
Todd Strader
09:55 AM Issue #1490 (Closed): Add an option to create a DPI protected library
Jumping off from here:
https://www.veripool.org/boards/3/topics/3037
I've got a WIP branch to show where I'm goin...
Todd Strader

08/22/2019

08:13 PM Issue #1483: Make verilator_ext_tests head-to-head
There's more to do here, but I'm focused on the DPI protected modules for now. But I believe this should be land-abl... Todd Strader

08/18/2019

01:09 AM Issue #1369: Raise error / warning on continous assignment to reg
In order to raise the warning for port, I've changed like the following:
In 'V3ParseGrammar.cpp'...
Kris Jeon

08/14/2019

08:03 PM Issue #1489 (Feature): Python support for Verilated designs
I've improved the patchset by Patrick Stewart (proposed in bug1663) to add Python support for Verilated designs.
It ...
Maarten De Braekeleer
 

Also available in: Atom