Project

General

Profile

[logo] 
 
Home
News
Activity
About/Contact
Major Tools
  Dinotrace
  Verilator
  Verilog-mode
  Verilog-Perl
Other Tools
  BugVise
  CovVise
  Force-Gate-Sim
  Gspice
  IPC::Locker
  Rsvn
  SVN::S4
  Voneline
  WFH
General Info
  Papers

Issues

If you wish to add a new issue, you must log in and create an account; "New Issue" will then appear in the menu bar. Sorry, but this was necessary to prevent form-filling spam.
Filters

Apply Clear

# Status Priority Subject Assignee Updated
1482 Feature Normal Conditional event controls ("iff") 07/26/2019 11:31 PM
1479 Feature Normal Feature Request: VerilatedVcd callback on rolloverMB Marc Jessome 07/22/2019 10:15 PM
1470 Feature Low VPI systemtf Stefan Wallentowitz 06/20/2019 02:07 PM
1469 Feature Low VPI module 06/20/2019 01:48 PM
1454 Feature Normal Support for loop index into generated arrays 06/04/2019 11:05 AM
1449 Closed Low deferred assertion support Wilson Snyder 06/16/2019 01:58 PM
1429 Resolved Normal Feature request: elaboration tasks 08/05/2019 02:35 AM
1423 Closed Normal 2 issues with unsized x/z constants Wilson Snyder 05/09/2019 01:37 AM
1397 NoFixNeeded Normal Error on unsized literal constants: Too many digits for 32 bit number 02/07/2019 12:49 AM
1383 Closed Normal Support SystemVerilog void casts & warn if not present Wilson Snyder 03/24/2019 01:15 AM
1363 AskedReporter Low CMake support Patrick Stewart 08/05/2019 09:15 PM
1360 Closed Normal Adding support for passing by reference Wilson Snyder 12/01/2018 08:17 PM
1359 WillNotFix Normal WaveJSON tracing support 10/08/2018 02:03 AM
1358 Closed Normal Improve FST support to show enums 10/27/2018 12:43 PM
1356 Closed Normal Support FST Sergi Granell 10/06/2018 02:13 PM
1350 Closed Low Support for immediate restict Wilson Snyder 10/06/2018 02:14 PM
1333 Closed Normal Support LXT2 file format natively Yu Sheng Lin 10/02/2018 10:48 PM
1328 NoFixNeeded Normal Parameter with type string cause compile error when passed to $readmemh(...) 12/12/2018 06:18 AM
1319 Closed Normal $clog2 should be allowed in Verilog 2005 James Hutchinson 06/13/2018 01:28 AM
1315 Feature Normal Using an array in a function called from a parameter 07/23/2019 07:53 PM
1292 Feature Normal scr1 test suite: |-> and |=> operators are unsupported in assertions 10/05/2018 01:01 AM
1291 WillNotFix Normal scr1 test suite: delayed always blocks are unsupported 03/10/2018 05:50 PM
1289 Closed Normal scr1 test suite: string.hextoa is not implemented 09/16/2018 09:27 PM
1287 WillNotFix Normal scr1 test suite: SystemVerilog nested @ blocks are not supported 03/09/2018 08:05 PM
1284 Closed Low Unsupported --annotate-min command line argument for verilator_coverage tool Wilson Snyder 03/17/2018 04:03 PM
(1-25/213) Per page: 25, 100, 250

Also available in: Atom CSV