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Issues: verilator/verilator

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#4298 opened Jun 17, 2023 by wsnyder
Open
Support full UVM -cc code generation
#1538 opened Oct 6, 2019 by veripoolbot
Open 42
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298 Open 2,944 Closed
298 Open 2,944 Closed
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Issues list

Support hashing signals to establish initial values status: ready Issue is ready for someone to fix; then goes to 'status: assigned' type: feature-non-IEEE Request to add new feature, outside IEEE 1800
#2662 opened Dec 1, 2020 by wsnyder
Identically named interfaces across hierarchy confuses Verilator status: ready Issue is ready for someone to fix; then goes to 'status: assigned'
#2656 opened Nov 25, 2020 by jedbian
3
Failure to link nested interfaces. area: elaboration Issue involves elaboration phase status: ready Issue is ready for someone to fix; then goes to 'status: assigned'
#2649 opened Nov 18, 2020 by dgarau
6
Internals: Move tristate to scope based and add resolution functions effort: weeks Expect this issue to require weeks or more of invested effort to resolve
#2635 opened Nov 9, 2020 by wsnyder
Optimize Reloop for better array detection area: performance Issue involves performance issues
#2631 opened Nov 8, 2020 by wsnyder
Optimize deep adjacent assignments in varNotReferenced area: performance Issue involves performance issues
#2630 opened Nov 8, 2020 by wsnyder
1
support $size(interface_array) status: ready Issue is ready for someone to fix; then goes to 'status: assigned' type: feature-IEEE Request to add new feature, described in IEEE 1800
#2628 opened Nov 5, 2020 by nndurj
4
Support concat on LHS assignment in constant functions area: elaboration Issue involves elaboration phase status: ready Issue is ready for someone to fix; then goes to 'status: assigned' type: feature-IEEE Request to add new feature, described in IEEE 1800
#2621 opened Nov 2, 2020 by rayx999
2
Queue constructor/default doesn't properly initialize area: data-types Issue involves data-types status: ready Issue is ready for someone to fix; then goes to 'status: assigned'
#2618 opened Nov 1, 2020 by wsnyder
1
Support for modport expressions type: feature-IEEE Request to add new feature, described in IEEE 1800
#2601 opened Oct 22, 2020 by rswarbrick
1
Improve --hierarchical performance area: performance Issue involves performance issues effort: weeks Expect this issue to require weeks or more of invested effort to resolve
#2583 opened Oct 4, 2020 by yTakatsukasa
2
Multiple assigns to same signal misordered area: wrong runtime result Issue involves an incorrect runtine result from Verilated model
#2576 opened Sep 29, 2020 by yanx21
4
BLKANDNBLK not reported on arrays so assignment statement does not take effect. status: ready Issue is ready for someone to fix; then goes to 'status: assigned'
#2574 opened Sep 28, 2020 by yanx21
1
Support for 'inside' with parameter arrays status: ready Issue is ready for someone to fix; then goes to 'status: assigned' type: feature-IEEE Request to add new feature, described in IEEE 1800
#2566 opened Sep 23, 2020 by dpetrisko
5
Optimizing parallel generates past elaboration area: performance Issue involves performance issues effort: weeks Expect this issue to require weeks or more of invested effort to resolve
#2550 opened Sep 15, 2020 by 1024bees
5
SystemVerilog stream operator non-datatype error status: ready Issue is ready for someone to fix; then goes to 'status: assigned' type: feature-IEEE Request to add new feature, described in IEEE 1800
#2548 opened Sep 13, 2020 by xver
14
Support stream operation on byte status: ready Issue is ready for someone to fix; then goes to 'status: assigned' type: feature-IEEE Request to add new feature, described in IEEE 1800
#2547 opened Sep 13, 2020 by xver
2
Bad code gives error on conditional logic inside output port of nested generate area: lint Issue involves SystemVerilog lint checking
#2541 opened Sep 11, 2020 by aignacio
8
Unsupported: The multidimensional array defined parameter is assigned with '{default:0} status: ready Issue is ready for someone to fix; then goes to 'status: assigned' type: feature-IEEE Request to add new feature, described in IEEE 1800
#2491 opened Jul 30, 2020 by phantom-killua
2
Optimize simple data movement area: performance Issue involves performance issues
#2486 opened Jul 27, 2020 by minjae63
2
Unsupported: The structure name is the same as the variable name area: parser Issue involves SystemVerilog parsing effort: weeks Expect this issue to require weeks or more of invested effort to resolve status: blocked Issue is waiting for another bug, when other bug is fixed, then goes to 'status: assigned'
#2485 opened Jul 27, 2020 by phantom-killua
2
Add warning when initialization instead of reset used for flip-flops area: lint Issue involves SystemVerilog lint checking type: feature-non-IEEE Request to add new feature, outside IEEE 1800
#2481 opened Jul 24, 2020 by norandomtechie
1
Fix V3Combine exponential performance issue area: performance Issue involves performance issues
#2471 opened Jul 17, 2020 by simdream
2
Provide array needs an array index warning area: data-types Issue involves data-types area: lint Issue involves SystemVerilog lint checking status: ready Issue is ready for someone to fix; then goes to 'status: assigned'
#2458 opened Jul 8, 2020 by Daichou
1
Support redeclaring type as non-type effort: weeks Expect this issue to require weeks or more of invested effort to resolve type: feature-IEEE Request to add new feature, described in IEEE 1800
#2412 opened Jun 10, 2020 by wsnyder
ProTip! Exclude everything labeled bug with -label:bug.