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	#	Status	Priority	Subject	Assignee	Updated
	1382	AskedReporter	Normal	Inconsistent LITENDIAN warnings on arrays		01/03/2019 09:40 AM
	1373	Feature	Normal	Cannot write to top-level tristate ports		12/06/2018 05:10 PM
	1366	AskedReporter	Normal	Large increase in design header file with threads and tracing		11/29/2018 11:13 PM
	1292	Feature	Normal	scr1 test suite: |-> and |=> operators are unsupported in assertions		10/05/2018 01:01 AM
	1314	Confirmed	Normal	Bad scaling, if there are nasty forests of generate statements	John Coiner	05/31/2018 11:25 PM
	1288	Confirmed	Normal	scr1 test suite: In some cases mixed assignment to struct member fails		03/10/2018 08:32 PM
	1286	Confirmed	Normal	scr1 test suite: processing passes get stuck, and allocate huge amounts of system RAM when verilog contains memory blocks		03/10/2018 04:21 AM
	1278	Confirmed	Normal	Unsupported LHS tristate construct: ARRAYSEL		02/26/2018 09:05 AM
	1104	Feature	Normal	No support for parameterized interface in module "signal" list.		11/23/2017 05:24 PM
	365	Feature	Normal	bidrectional arrays not supported as module ports		11/23/2017 04:45 PM
	1011	Confirmed	Normal	Can't reference interface functions inside of generate blocks		11/19/2017 12:56 PM
	1008	Confirmed	Normal	Incorrect results with partially out-of-bounds part select (re-opened)		11/19/2017 12:54 PM
	1184	Feature	Normal	Verilator doesn't detect multiple assignment		11/19/2017 12:53 PM
	1185	Feature	Normal	Support for interfaces in top level ports		08/29/2017 02:54 AM
	1096	Confirmed	Normal	UNOPT and UNOPTFLAT V3Split optimizations		07/12/2017 02:14 AM
	63	Feature	Normal	False Signal unoptimizable: circular logic warning		05/27/2016 10:14 PM
	1036	Confirmed	Normal	Reset fails to respond when driven from vector containing clock enable		02/24/2016 02:42 PM
	1027	Confirmed	Normal	Partly out of range part-select gives wrong runtime result		02/10/2016 07:30 PM
	377	Feature	Normal	Support classes and methods		02/06/2016 11:16 PM
	860	Feature	Low	Support for /*verilator public*/ on SV structs too?		12/19/2014 11:17 PM
	850	Feature	Normal	Find UNUSED and UNDRIVEN components in structs	Jeremy Bennett	11/26/2014 10:03 PM
	792	Confirmed	Normal	Incorrect handling of index out of declared bound on multi-dim packed array		06/30/2014 07:34 AM
	784	Feature	Normal	Support for SystemVerilog coverage		06/10/2014 02:00 AM
	757	Feature	Normal	Verilator handling of combo always block		05/02/2014 12:40 PM
	726	Feature	Normal	Support enum type checking lint checks		03/25/2014 12:27 AM

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