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Activity

From 02/28/2013 to 03/29/2013

03/28/2013

10:55 AM Using AUTOs: RE: How can I make AUTOARG and AUTOINST output verilog with one port per line ?
AUTOINST already is one port per line. AUTOARG doesn't have an option, but generally diffs in that region can be ign... Wilson Snyder
08:56 AM Using AUTOs: How can I make AUTOARG and AUTOINST output verilog with one port per line ?
Hi,
Having a single port per line is important for tracking changes in code.
NOT using one-port-per-line usually ...
Shahar Klein

03/04/2013

07:04 PM Using AUTOs: RE: Unable to use AUTO_TEMPLATE to match leading backslashes in module portnames
Wilson, thanks for taking the time to reply - especially so quickly! Robbie Adler
07:02 PM Using AUTOs: RE: Unable to use AUTO_TEMPLATE to match leading backslashes in module portnames
I was able to answer my own question by using an exclusion regexp that got the \ followed by regexps for the other st... Robbie Adler
02:24 PM Using AUTOs: RE: Unable to use AUTO_TEMPLATE to match leading backslashes in module portnames
It doesn't presently accept backslashes in the wildcard part, but you can cheat and use .* to hack around this. Esca... Wilson Snyder
02:11 PM Using AUTOs: Unable to use AUTO_TEMPLATE to match leading backslashes in module portnames
Hi-
I've been having a devil of a time trying to get an AUTO_TEMPLATE to match leading backslahes in my module's p...
Robbie Adler
 

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