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Activity

From 12/19/2019 to 01/17/2020

01/15/2020

11:39 PM Issue #1661: How is ppdefine in SigParser used
ppdefine/ppinclude are very old remnants of a perl preprocessor. I have just removed them. If you want to see define... Wilson Snyder
04:41 PM Issue #1661: How is ppdefine in SigParser used
Wilson Snyder wrote:
> To use SigParser you need to pass preprocessed data. See "man Verilog::SigParser":
>
> ...
Topa Tota
12:05 PM Issue #1661 (NoFixNeeded): How is ppdefine in SigParser used
To use SigParser you need to pass preprocessed data. See "man Verilog::SigParser":
my $pp = Verilog::Preproc->n...
Wilson Snyder
05:02 AM Issue #1661: How is ppdefine in SigParser used
Sorry Clicked on create and can't edit it. I'll rewrite below:
Whenever I attempt to parse a file using Verilog::S...
Topa Tota
04:54 AM Issue #1661 (NoFixNeeded): How is ppdefine in SigParser used
.. below Topa Tota

01/11/2020

02:16 PM Issue #1659 (Resolved): Preprocessor doesn't handle one case of definition substitution properly
Fixed in git towards eventual 3.472 release.
Also added to Verilator.
Wilson Snyder

01/10/2020

11:52 AM Issue #1659 (Confirmed): Preprocessor doesn't handle one case of definition substitution properly
Will fix this after next Verilator release. (Verilator has same preprocessor.)
Wilson Snyder
04:45 AM Issue #1659 (Resolved): Preprocessor doesn't handle one case of definition substitution properly
If you run the preprocessor on this code... Topa Tota
11:10 AM Issue #1658: Verilog::Preproc misdocuments def_exists instead of def_params
Thanks for the rewording, pushed to git.
Wilson Snyder
04:55 AM Issue #1658: Verilog::Preproc misdocuments def_exists instead of def_params
Wilson Snyder wrote:
> Hi, thanks for your report.
>
> I prefer to keep it backward compatible, so I've committed...
Topa Tota

01/09/2020

10:48 AM Issue #1658 (Closed): Verilog::Preproc misdocuments def_exists instead of def_params
Hi, thanks for your report.
I prefer to keep it backward compatible, so I've committed fixing this as a documentat...
Wilson Snyder
02:55 AM Issue #1658: Verilog::Preproc misdocuments def_exists instead of def_params
Looking more through the code.
defExists calls defParams (Preproc.xs line 134) which calls def_params (Preproc.xs ...
Topa Tota
02:27 AM Issue #1658 (Closed): Verilog::Preproc misdocuments def_exists instead of def_params
In the package Verilog::Preproc, the callback def_exists doesn't get called at all (at least I haven't found any situ... Topa Tota

12/21/2019

03:22 PM Issue #526 (WillNotFix): Support UVM
The verilog-perl parser is unlikely to be improved beyond current support. Attention is instead being given to the V... Wilson Snyder
 

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