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# Status Priority Subject Assignee Updated
1658 Closed Normal Verilog::Preproc misdocuments def_exists instead of def_params Wilson Snyder 01/10/2020 11:10 AM
1497 Closed Normal Verilog::Netlist::Cell->range doesn't return undef Wilson Snyder 09/04/2019 01:37 AM
1432 Closed Normal Please add whatis entry in Netlist/PinSelection.pm 05/11/2019 10:11 PM
1428 Closed Normal Install problem from CPAN with 5.26.3/darwin-thread-multi-2level Jack Langsdorf 05/05/2019 02:01 AM
1420 Closed Normal vrename --change misses escaped name if it is followed a newline for whitespace Wilson Snyder 05/01/2019 11:39 AM
1394 Closed Normal Verilog::Std::std can return blank `std` package. Wilson Snyder 01/28/2019 10:18 PM
1393 Closed Normal Support ranged instances Wilson Snyder 01/25/2019 12:03 AM
1340 Closed Normal Constants split across lines Wilson Snyder 09/16/2018 09:28 PM
1299 Closed High perl-Verilog-Perl-3.448 fails on test t/35_sigparser.t Wilson Snyder 05/19/2018 11:58 AM
1252 Closed Normal flex v 2.6.4: comment in VParseLex.l is causing my flex to barf... Rob Stoddard 01/02/2018 11:04 PM
1205 Closed Normal Issue handling replications in new parser 09/21/2017 10:49 PM
1200 Closed Normal Concat parsing issue 09/09/2017 01:56 AM
1162 Closed Normal Parser reports incorrect filename / linenumber when parsing SystemVerilog class Wilson Snyder 09/09/2017 01:56 AM
1132 Closed Normal How to pass SV packages to verilog::getopt? Wilson Snyder 03/06/2017 12:31 PM
1107 Closed Normal Enum widths do not get reported by Verilog::SigParser Lalit Chhabra 11/24/2016 01:31 PM
1063 Closed Normal Preproc.so causes segfault during Storable retrieve Wilson Snyder 07/30/2016 02:05 PM
1049 Closed Normal Do not overwrite existing assignments in new_contassign(). 07/30/2016 02:05 PM
975 Closed Low Minor POD error in Getopt.pm Gene Sullivan 10/02/2015 10:19 PM
939 Closed Normal Failed tests at t/42_dumpcheck.t in version 3.414 Wilson Snyder 10/02/2015 10:20 PM
923 Closed Normal Installation fails for Verilog-Perl-3.412 on mac OS X 10.10.3 06/26/2015 10:31 AM
917 Closed High Comments not retained properly for last input/output declaration 06/26/2015 10:31 AM
915 Closed Urgent Verilog::Parser can't handle "`\" token in macro definition Wilson Snyder 06/26/2015 10:30 AM
913 Closed Normal Endless loop in Verilog::Preproc Wilson Snyder 06/26/2015 10:30 AM
899 Closed Low Lexing of `protected/`endprotected sections can never complete Wilson Snyder 06/26/2015 10:30 AM
896 Closed Normal Typo in Getopt.pm (len vs. length)? 03/17/2015 03:23 AM
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