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Leon Medpum

  • Email: Must_Login
  • Registered on: 09/10/2017
  • Last connection: 09/10/2017

Issues

Activity

09/11/2017

11:46 PM Verilog-Perl Issue #1206 (NoFixNeeded): Multi dimensional arrays
is this expected to work?...
11:20 PM Verilog-Perl Issue #1205 (Closed): Issue handling replications in new parser
Git version: 5f176d451876f859bce9ce294a67e3874aa2dfe6
We have some verilog that looks like this:...
04:36 PM Verilog-Perl Issue #1201: Can't get Verilog::Netlist::Net object from Pin for partial vector
Sorry, I don't know how to display the bus notation in this form without the pre tags. The backslash was just so it ...
03:13 PM Verilog-Perl Issue #1201: Can't get Verilog::Netlist::Net object from Pin for partial vector
On further follow up, this is due to the 'use_pinselects => 1' option. I do noty understand why the behavior change...
02:00 PM Verilog-Perl Issue #1201: Can't get Verilog::Netlist::Net object from Pin for partial vector
After looking at it further, I don't understand why your code seems to misdetect the net\[0] and correctly handles th...
01:49 PM Verilog-Perl Issue #1201: Can't get Verilog::Netlist::Net object from Pin for partial vector
The net2\[0] is legal verilog. I agree the net is not 'net2' it is actually 'net2\[0]' The '\' and space at the end...

09/10/2017

12:59 PM Verilog-Perl Issue #1201 (NoFixNeeded): Can't get Verilog::Netlist::Net object from Pin for partial vector
using git version: 5f176d451876f859bce9ce294a67e3874aa2dfe6
I have the following Verilog:...

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