Yossi Nivin
- Email: Must_Login
- Registered on: 03/02/2018
- Last connection: 10/07/2019
Issues
Activity
10/07/2019
- 12:04 PM Verilator Issue #1545: Warning-CASEOVERLAP is not triggering for signals wider than 12
- Thanks for confirming and providing the workaround.
I was suspecting this kind of lookup table to be the limiting fa... - 09:33 AM Verilator Issue #1545 (Confirmed): Warning-CASEOVERLAP is not triggering for signals wider than 12
- Hi,
I noticed that I'm not getting the CASEOVERLAP warnings if the value is wider than 12 bits.
In the example be...
03/02/2018
- 04:38 PM Verilator Issue #1282: False UNOPTFLAT warning when using 2 interfaces with the same name on different hier...
- I accidentally uploaded the test-case after the fix. Please use the updated one.
- 04:30 PM Verilator Issue #1282 (): False UNOPTFLAT warning when using 2 interfaces with the same name on different h...
- I ran into false UNOPTFLAT warning while adding an interface to my design. After investigating it a little bit, I fou...
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