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Yuri Z

  • Email: Must_Login
  • Registered on: 10/19/2019
  • Last connection: 10/19/2019

Issues

Activity

10/20/2019

06:37 PM Verilator Issue #1571: Memory definition triggers the error "Signal unoptimizable: Feedback to clock or cir...
Here they declare the memory in essentially the same way: http://www.asic-world.com/verilog/memory_fsm1.html
06:34 PM Verilator Issue #1571 (NoFixNeeded): Memory definition triggers the error "Signal unoptimizable: Feedback t...
I have this statement defining the memory that triggers this error:...
08:59 AM Verilator Issue #1569 (WillNotFix): $monitor statement isn't supported
Here the $monitor statement is described: http://www.referencedesigner.com/tutorials/verilog/verilog_09.php
Here is ...

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