- Email: Must_Login
- Registered on: 02/08/2010
- Last connection: 10/10/2018
- 04:41 PM Verilator Usage: RE: multiple -CFLAGS
- Thanks for the updated documentation. I actually tried both before writing this post. I was already getting angry, wh...
- I would like to pass more then one include path with
-CFLAGS -Ipath1 -Ipath2
but the generated Makefile conta...
- 11:38 AM Verilator Issue #1356: Support FST
- I tried to compile pa packed struct example in Icarus Verilog (10.1 included in Ubuntu 18.04), but I only got wires a...
- 09:23 PM Verilator Development: RE: A way to support LXT2 file format natively
- In 2013 I created a set of examples to be used to test waveform support for SystemVerilog datatypes.
- 10:32 AM Verilator Development: RE: A way to support LXT2 file format natively
What is the reasoning behind choosing *LXT2*, I assume it is file size.
I would prefer another GTKWave form...
- 07:10 PM Verilator Issue #1338: --trace of SystemVerlog string gives compile error
- 07:10 PM Verilator Issue #1345 (Closed): String conditional operation gives compile error
- This is an error compiling generated C++ code. I assume it is related to SV string type functionality, but it could b...
- 05:24 PM Verilator Issue #1338: --trace of SystemVerlog string gives compile error
- I was able to run the test code properly with the fixed Verilator, then I encountered another error compiling generat...
- 07:53 PM Verilator Issue #1338: --trace of SystemVerlog string gives compile error
- I will attach a tarball containing my build with all generated files, so you would be able to see if there are errors...
- 06:53 PM Verilator Issue #1338: --trace of SystemVerlog string gives compile error
- Hi, I updated the string regression test and run "make test", and there was no error, but I am unsure if the test was...
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