- Email: Must_Login
- Registered on: 03/14/2008
- Last connection: 02/24/2017
- Veripool (Manager, 03/16/2008)
- Verilator (Manager, 03/16/2008)
- TestProject (Manager, 04/02/2008)
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- Schedule::Load (Manager, 04/02/2008)
- SVN::S4 (Manager, 04/02/2008)
- SystemPerl (Manager, 04/02/2008)
- Verilog-mode (Manager, 04/02/2008)
- Verilog-Pli (Manager, 04/02/2008)
- Voneline (Manager, 04/02/2008)
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- Synopsys-Modes (Manager, 04/02/2008)
- CovVise (Manager, 10/01/2008)
- Metrigator (Manager, 06/07/2010)
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- Force-Gate-Sim (Manager, 09/22/2010)
- 07:40 PM Verilator Development: RE: Where is the Git repo ?
- That's a git URL, not one to use in your browser.
- 01:00 AM Verilator Usage: RE: Including a large number of files
- As to the best approach, that is to follow the standard methodology with have one file per module, which "vsplitmodul...
- 01:09 PM Verilog-mode Using AUTOs: RE: combine bus width from multi-instance AUTO
- Yes, this us too complicated. You should manually declare the wire etc.
- 11:12 PM Verilator Issue #1130 (Resolved): LDFLAGS in arguments file are reordered
- Simple enough, should have used a List instead of a Set; for CFLAGS also. Pushed to git towards 3.902.
- 11:28 PM Verilog-mode Issue #1102 (Closed): verilog-sk-* skeletons activated automatically as I type
- Fixed in git and verilog-mode-2017-02-12-224d7a2-vpo
Attached is the patch I cleaned up if it's historically valua...
- 12:06 PM Verilator Usage: RE: Signed values
- The size of the signals can be read using the VPI. Also they are declared using macros which could do something speci...
- 10:28 PM Verilog-mode Issue #1125 (NoFixNeeded): AUTOINPUT expansion for Interfaces not working?
- Verilog-mode needs to know what is a data type. Add e.g.
// Local Variables:
// verilog-typedef-regexp: "enum_"
- 10:18 PM Verilog-mode Issue #1102: verilog-sk-* skeletons activated automatically as I type
- If you'd like your patch merged in, could you please make your patch relative to the latest verilog-mode.el (from git...
- 12:44 PM Verilator Usage: RE: Best practice for overriding VL_VPRINTF and VL_VPRINTF
- -FI option added in git towards 3.902.
- 03:24 AM Verilog-mode General: RE: Auto Param
- I see the value of this, but at present the parser could only easily support making
module my_top #(
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