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Robert Swan

  • Email: Must_Login
  • Registered on: 08/10/2010
  • Last connection: 07/25/2018

Issues

Activity

07/06/2018

01:39 AM Verilog-mode Issue #1321: indentation of coverpoint is incorrect if coverpoint expression is a concatenation
The following is working for me:
verilog-mode version 2018-05-26-be4eda3-vpo:...

06/20/2018

02:48 PM Verilog-mode Issue #1321 (Confirmed): indentation of coverpoint is incorrect if coverpoint expression is a con...
Coverpoints on curly-brace concatenations indent incorrectly, and accumulate indent level. ...

11/09/2016

05:10 PM Verilog-mode Issue #1106: hs-special-modes-alist grows indefinitely
Verilog-mode.el has a bug, and you're correct, @verilog-mode-mode@ should be changed to @verilog-mode@, not the other...
03:28 PM Verilog-mode Issue #1106: hs-special-modes-alist grows indefinitely
Well, formatting is messed up but probably you get the idea....
03:23 PM Verilog-mode Issue #1106 (NoFixNeeded): hs-special-modes-alist grows indefinitely
(when (boundp 'hs-special-modes-alist)
(unless (assq 'verilog-mode hs-special-modes-alist)
(setq hs-spe...

08/10/2010

01:55 PM Verilog-mode General: underscore as word boundary
Would be great if I could keep underscore as a word boundary, so that forward-word, backwards-word, delete-word etc. ...

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