Clifford Wolf
- Email: Must_Login
- Registered on: 04/03/2014
- Last connection: 09/24/2018
Issues
- Assigned issues: 0
- Reported issues: 27
Activity
09/24/2018
- 08:23 AM Verilator Issue #1350: Support for immediate restict
- Wilson Snyder wrote:
> Also note this version will add $past.
Awesome! Thanks.
09/23/2018
- 07:50 AM Verilator Issue #1351 (WillNotFix): Support for loading stimulus from VCD file
- A feature that allows loading a stimulus from a VCD file would be great. One application I am interested in, and coul...
- 07:46 AM Verilator Issue #1350 (Closed): Support for immediate restict
- Verilator has support for immediate assert and assume. Immediate restrict statements should simply be parsed identica...
11/26/2015
- 11:39 AM Verilator Issue #1008 (Confirmed): Incorrect results with partially out-of-bounds part select (re-opened)
- Sorry, I don't know how to re-open a closed issue.. (can I even do that?)
A year ago I reported issue #823: Incorr...
11/12/2015
- 05:50 PM Verilator Issue #999: $signed ignored under generate block
- I have now successfully created a minimal test case:...
- 03:10 PM Verilator Issue #999 (Closed): $signed ignored under generate block
- A PicoRV32 user reported problems with simulating the PicoRV32 CPU with Verilator. So I investigated and found the fo...
09/23/2014
- 10:19 AM Verilator Issue #823 (Closed): Incorrect results with partially out-of-bounds part select
- This should return `y=4'b100x` for `a=1`, but verilator returns `y=0` instead
(the MSB should be '1', obviously we d...
05/25/2014
- 08:48 AM Verilator Issue #776 (Closed): Incorrect results with XNOR/shift expression
- This should always return `y=4'b1111`, but Verilator f705f9b only does this for `a=0`:
module issue_053(a, y);...
05/24/2014
- 05:47 PM Verilator Issue #775: Strange Verilator "Unsupported" Error
- jfyi: I've now changed the text of the bug report in the vloghammer tracker to the following:
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Verilator f7... - 05:34 PM Verilator Issue #775: Strange Verilator "Unsupported" Error
- Wilson Snyder wrote:
> Spoiler: It's a reduction XOR so if you change one bit you flip between % 0 or % 1.
argwl....
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